EVALADM1065TQEB Analog Devices Inc, EVALADM1065TQEB Datasheet - Page 24

• Manufacturer Part Number: EVALADM1065TQEB
• Manufacturer: Analog Devices Inc

Specifications of EVALADM1065TQEB

• Lead Free Status / Rohs Status: Not Compliant

ADM1065
READ OPERATIONS
The ADM1065 uses the following SMBus read protocols.
Receive Byte
In a receive byte operation, the master device receives a single
byte from a slave device, as follows:
1.
2.
3.
4.
5.
6.
In the ADM1065, the receive byte protocol is used to read a
single byte of data from a RAM or EEPROM location whose
address has previously been set by a send byte or write byte/word
operation, as shown in Figure 35.
Block Read
In a block read operation, the master device reads a block of
data from a slave device. The start address for a block read must
have been set previously. In the ADM1065, this is done by a
send byte operation to set a RAM address, or a write byte/word
operation to set an EEPROM address. The block read operation
itself consists of a send byte operation that sends a block read
command to the slave, immediately followed by a repeated start
and a read operation that reads out multiple data bytes, as follows:
1.
2.
3.
4.
5.
6.
7.
8.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The addressed slave device asserts an ACK on SDA.
The master receives a data byte.
The master asserts a NACK on SDA.
The master asserts a stop condition on SDA, and the
transaction ends.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an ACK on SDA.
The master sends a command code that tells the slave
device to expect a block read. The ADM1065 command
code for a block read is 0xFD (1111 1101).
The slave asserts ACK on SDA.
The master asserts a repeat start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The slave asserts an ACK on SDA.
Figure 35. Single Byte Read from the EEPROM or RAM
S
1
ADDRESS
SLAVE
2
R
3
A
DATA
4
A
5
6
P
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9.
10. The master asserts an ACK on SDA.
11. The master receives 32 data bytes.
12. The master asserts an ACK on SDA after each data byte.
13. The master asserts a stop condition on SDA to end the
Error Correction
The ADM1065 provides the option of issuing a packet error
correction (PEC) byte after a write to the RAM, a write to the
EEPROM, a block write to the RAM/EEPROM, or a block read
from the RAM/ EEPROM. This option enables the user to verify
that the data received by or sent from the ADM1065 is correct.
The PEC byte is an optional byte sent after the last data byte is
written to or read from the ADM1065. The protocol is the same
as a block read for Step 1 to Step 12 and then proceeds as follows:
13. The ADM1065 issues a PEC byte to the master. The master
14. A NACK is generated after the PEC byte to signal the end
15. The master asserts a stop condition on SDA to end the
Note that the PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
See the SMBus Version 1.1 specification for details.
An example of a block read with the optional PEC byte is shown
in Figure 37.
1
S
S
1
ADDRESS
ADDRESS
SLAVE
SLAVE
The ADM1065 sends a byte-count data byte that tells the
master how many data bytes to expect. The ADM1065
always returns 32 data bytes (0x20), which is the maximum
allowed by the SMBus Version 1.1 specification.
transaction.
checks the PEC byte and issues another block read, if the PEC
byte is incorrect.
of the read.
transaction.
C(x) = x
2
2
Figure 37. Block Read from the EEPROM or RAM with PEC
W A
W A
Figure 36. Block Read from the EEPROM or RAM
8
3
3
+ x
COMMAND 0xFD
COMMAND 0xFD
(BLOCK READ)
(BLOCK READ)
2
+ x
4
4
1
+ 1
5
A
5
A
S
6
6
S
ADDRESS
ADDRESS
SLAVE
SLAVE
7
7
R A
R A
8
8
COUNT
COUNT
BYTE
BYTE
9
9
DATA
32
10
10
A
A
A
DATA
DATA
DATA
11
11
32
1
1
PEC
13
12
12
A
A
A
14
A
15
13
P
P