AT45DB642D-CNU SL954 Atmel, AT45DB642D-CNU SL954 Datasheet - Page 21

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AT45DB642D-CNU SL954

Manufacturer Part Number
AT45DB642D-CNU SL954
Description
Manufacturer
Atmel
Datasheet

Specifications of AT45DB642D-CNU SL954

Density
64Mb
Access Time (max)
6ns
Interface Type
Parallel/Serial-SPI
Address Bus
1/8Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
CASON
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
8M
Supply Current
15mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant
Figure 10-3. Program Security Register
10.2.2
Figure 10-4. Read Security Register
3542K–DFLASH–04/09
SO or IO
SI or IO
SI or IO
Reading the Security Register
7
7
- IO
- IO
CS
7
- IO
CS
0
0
0
Each transition
represents 8 bits
Each transition
represents 8 bits
The Security Register can be read by first asserting the CS pin and then clocking in an opcode
of 77H followed by three dummy bytes if using the serial interface and seven dummy bytes if
using the 8-bit interface. After the last don't care bit has been clocked in, the content of the
Security Register can be clocked out on the SO or I/O7 - I/O0 pins. After the last byte of the
Security Register has been read, additional pulses on the SCK/CLK pin will simply result in
undefined data being output on the SO or I/O7 - I/O0 pins.
Deasserting the CS pin will terminate the Read Security Register operation and put the SO or
I/O7 - I/O0 pins into a high-impedance state.
Opcode
Opcode
Byte 1
Opcode
Byte 2
X
Opcode
Byte 3
X
Opcode
Byte 4
X
Data Byte
n
Data Byte
n
Data Byte
n + 1
Data Byte
n + 1
Data Byte
n + x
Data Byte
n + x
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