IS42S16400A-7TI ISSI, Integrated Silicon Solution Inc, IS42S16400A-7TI Datasheet - Page 32

• Manufacturer Part Number: IS42S16400A-7TI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS42S16400A-7TI

• Lead Free Status / Rohs Status: Not Compliant

IS42S16400A
CLOCK SUSPEND
Clock suspend mode occurs when a column access/burst
is in progress and CKE is registered LOW. In the clock
suspend mode, the internal clock is deactivated, “freezing”
the synchronous logic.
For each positive clock edge on which CKE is sampled
LOW, the next internal positive clock edge is suspended.
Clock Suspend During WRITE Burst
Clock Suspend During WRITE Burst
32
COMMAND
INTERNAL
ADDRESS
CLOCK
INTERNAL
COMMAND
CKE
ADDRESS
CLK
DQ
CLOCK
CKE
CLK
DQ
READ
BANK a,
COL n
T0
NOP
T0
NOP
T1
WRITE
BANK a,
COL n
D
Integrated Silicon Solution, Inc. — www.issi.com —
T1
IN
n
NOP
T2
D
IN
n
T2
T3
Any command or data present on the input pins at the time
of a suspended internal clock edge is ignored; any data
present on the DQ pins remains driven; and burst counters
are not incremented, as long as the clock is suspended.
(See following examples.)
Clock suspend mode is exited by registering CKE HIGH;
the internal clock and related operation will resume on the
subsequent positive clock edge.
T3
D
IN
n+1
NOP
T4
D
NOP
IN
T4
n+1
NOP
D
T5
IN
D
n+2
DON'T CARE
NOP
IN
T5
n+2
DON'T CARE
NOP
D
T6
IN
n+3
ISSI
1-800-379-4774
04/16/03
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