MT48H8M32LFB5-8 IT:G TR Micron Technology Inc, MT48H8M32LFB5-8 IT:G TR Datasheet - Page 51
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MT48H8M32LFB5-8 IT:G TR
Manufacturer Part Number
MT48H8M32LFB5-8 IT:G TR
Description
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet
1.MT48H8M32LFB5-8_ITG_TR.pdf
(86 pages)
Specifications of MT48H8M32LFB5-8 IT:G TR
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
9/7ns
Maximum Clock Rate
125MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
115mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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Figure 20: READ-to-WRITE With Extra Clock Cycle
Figure 21: READ-to-PRECHARGE
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
Note:
Note:
Command
Command
Command
Address
Address
Address
1. CL = 3. The READ command can be issued to any bank, and the WRITE command can be
1. DQM is LOW.
DQM
CLK
to any bank.
CLK
CLK
DQ
DQ
DQ
Bank a,
Bank a,
Bank,
T0
T0
Col n
T0
READ
Col n
READ
READ
Col
CL = 2
CL = 3
T1
T1
T1
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
NOP
NOP
NOP
51
T2
T2
T2
NOP
NOP
NOP
D
OUT
Transitioning data
T3
T3
T3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
NOP
NOP
D
D
D
t HZ
OUT
OUT
OUT
PRECHARGE
PRECHARGE
(a or all)
(a or all)
T4
T4
T4
Bank
Bank
NOP
X = 1 cycle
D
D
Transitioning data
OUT
OUT
X = 2 cycles
T5
T5
T5
Don’t Care
Bank,
WRITE
Col b
NOP
NOP
D
D
D
OUT
OUT
IN
t DS
t RP
t RP
©2008 Micron Technology, Inc. All rights reserved.
T6
T6
READ Operation
NOP
NOP
D
OUT
Don’t Care
ACTIVE
Bank a,
ACTIVE
Bank a,
T7
T7
Row
Row
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