IS43R86400D-6BLI ISSI, Integrated Silicon Solution Inc, IS43R86400D-6BLI Datasheet
IS43R86400D-6BLI
Specifications of IS43R86400D-6BLI
Related parts for IS43R86400D-6BLI
IS43R86400D-6BLI Summary of contents
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... IS43R86400D IS43/46R16320D, IS43/46R32160D 16Mx32, 32Mx16, 64Mx8 512Mb DDR SDRAM FEATURES • VDD and VDDQ: 2.5V ± 0.2V (-5, -6) • VDD and VDDQ: 2.5V ± 0.1V (-4) • SSTL_2 compatible I/O • Double-data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe (DQS) is transmitted/ ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D FUNCTIONAL BLOCK DIAGRAM ( CK COMMAND CK DECODER CKE & CS CLOCK RAS GENERATOR CAS WE Mode Registers and Ext. Mode Registers A12 15 A11 A10 ROW ADDRESS BA0 LATCH BA1 13 13 COLUMN ADDRESS LATCH 9 BURST COUNTER COLUMN ADDRESS BUFFER 2 32) x REFRESH CONTROLLER SELF ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D FUNCTIONAL BLOCK DIAGRAM ( CK COMMAND CK DECODER CKE & CS CLOCK RAS GENERATOR CAS WE Mode Registers and Ext. Mode Registers A12 15 A11 A10 ROW ADDRESS BA0 LATCH 13 BA1 13 COLUMN ADDRESS LATCH 10 BURST COUNTER COLUMN ADDRESS BUFFER Integrated Silicon Solution, Inc. Rev. 00A ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D PIN CONFIGURATIONS 66 pin TSOP - Type II for DQ0 DQ1 DQ2 DQ3 DDQ NC NC VDD CAS RAS CS NC BA0 BA1 A10/ VDD PIN DESCRIPTION: x8 A0-A12 Row Address Input A0-A9, A11 Column Address Input BA0, BA1 Bank Select Address DQ0 – DQ7 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D PIN CONFIGURATION Package Code B: 60-ball FBGA (top view) for x8 (8mm x 13mm Body, 0.8mm Ball Pitch) Top View (Balls seen through the Package) : Ball Existing : Depopulated Ball Top View(See the balls through the Package BGA Package Ball Pattern Top View ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D PIN CONFIGURATIONS 66 pin TSOP - Type II for x16 V DD DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 NC V DDQ LDQS NC VDD NC LDM WE CAS RAS CS NC BA0 BA1 A10/ VDD PIN DESCRIPTION: x16 A0-A12 Row Address Input A0-A9 Column Address Input ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D PIN CONFIGURATION Package Code B: 60-ball FBGA (top view) for x16 (8mm x 13mm Body, 0.8mm Ball Pitch) Top View (Balls seen through the Package) : Ball Existing : Depopulated Ball Top View(See the balls through the Package BGA Package Ball Pattern ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D PIN CONFIGURATION Package Code B: 144-ball FBGA (top view) (12mm x 12mm Body, 0.8mm Ball Pitch) Top View (Balls seen through the package DQS0 DM0 B DQ4 VDDQ C DQ6 DQ5 D DQ7 VDDQ E DQ17 DQ16 F DQ19 DQ18 G DQS2 DM2 H DQ21 DQ20 J DQ22 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D PIN FUNCTIONAL DESCRIPTIONS Symbol Type Description CK, CK Input Clock: CK and CK are differential clock inputs. All address and control input signals are sampled on the crossing of the positive edge of CK and negative edge of CK. Input and output data is referenced to the crossing of CK and CK (both directions of crossing). Internal clock signals are derived from CK/ CK ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D COMMANDS TRUTH TABLES All commands (address and control signals) are registered on the positive edge of clock (crossing of CK going high and CK going low). Truth Table shows basic timing parameters for all commands. TRUTH TABLE - COMMANDS NAME (FUNCTION) DESELECT (NOP) ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D TRUTH TABLE - CKE CKE n-1 CKE n Current State L L Power Down L L Self Refresh L H Power Down L H Self Refresh H L All Banks Idle H L Bank(s) Active H L All Banks Idle H H Notes: 1. CKEn is the logic state of CKE at clock edge n; CKEn-1 was the state of CKE at the previous clock edge. ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D Power Applied Power On Precharge PREALL MRS EMRS Write Write A PREALL = Precharge All Banks CKEL = Enter Power Down MRS = Mode Register Set CKEH = Exit Power Down EMRS = Extended Mode Register Set ACT = Active 12 SIMPLIFIED STATE DIAGRAM REFS REFSX MRS ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D FUNCTIONAL DESCRIPTION The DDR SDRAM is a high speed CMOS, dynamic random-access memory internally configured as a quad-bank DRAM. The 512Mb devices contains: 536,870,912 bits. The DDR SDRAM uses double data rate architecture to achieve high speed operation. The double data rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D Initialization Waveform Sequence VDD tVDT≥ 0 VDDQ VTT (system ) 1 VREF tIS tIH CKE LVCMOS LOW LEVEL ( ( ) ) t IS tIH ( ( ) ) COMMAND NOP ( ( ) ) ( ( ) ) Address ( ( ) ) ( ( ) ) BA0, BA1 ( ( ) ) High DQS ) ) High 200 µs Power- -up: VDD and CLK stable Notes: 1. VTT is not applied directly to the device, however tVTD must be greater than or equal to zero to avoid device latch--up. ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D MODE REGISTER (MR) DEFINITION The Mode Register is used to define the specific mode of operation of the DDR SDRAM. This definition includes the definition of a burst length, a burst type, and a CAS latency. The Mode Register is programmed via the MODE REGISTER SET command (with BA0=0 and BA1=0) and will retain the stored information until it is reprogrammed, or the device loses power ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D BURST LENGTH Read and write accesses to the DDR SDRAM are burst oriented, with the burst length being set and the burst order as in Burst Definition. The burst length determines the maximum number of column locations that can be accessed for a given READ or WRITE command ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D When a READ or WRITE command is issued, a block of columns equal to the burst length is effectively selected. All accesses for that burst take place within the block, meaning that the burst will wrap within the block if a boundary is reached. The block is uniquely selected by A1-An when the burst length is set to two, by A2-An when the burst length is set A3-An when the burst length is set to 8 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D 18 CAS LATENCIES Integrated Silicon Solution, Inc. Rev. 00A 09/14/09 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D EXTENDED MODE REGISTER (EMR) DEFINITION The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional functions include DLL enable/disable, and output drive strength selection. The Extended Mode Register is programmed via the MODE REGISTER SET command (with BA1=0 and BA0=1) and will retain the stored information until it is reprogrammed, or the device loses power ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D Absolute Maximum Rating Parameter Voltage on any pin relative to VSS Voltage on VDD & VDDQ supply relative to VSS Storage temperature Power dissipation Short circuit current Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommend operation condition. ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D CAPACITANCE CHARACTERISTICS ( 2.5V + 0.2V (-5, -6 ddq Symbol Parameter CI(A) Input Capacitance, address pin CI(C) Input Capacitance, control pin CI(K) Input Capacitance, CLK pin CI/O I/O Capacitance, I/O, DQS, DM pin Integrated Silicon Solution, Inc. Rev. 00A 09/14/ 2.5V + 0.1V (-4), Vss = VssQ = 0V, unless otherwise noted) ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D IDD Specification Parameters and Test Conditions: x8, x16 ( 2.5V ± 0.2V (-5, -6 ddq dd Symbol Parameter/ Test Condition IDD0 Operating current for one bank active-precharge; tRC = tRC(min); tCK = tCK(min); DQ, DM and DQS inputs changing once per clock cycle; address and control inputs changing once every two clock cycles ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D IDD Specification Parameters and Test Conditions: x32 ( 2.5V ± 0.2V (-5, -6), Vss = VssQ = 0V, Output Open, unless otherwise noted) dd ddq Symbol Parameter/ Test Condition IDD0 Operating current for one bank active-precharge; tRC = tRC(min); tCK = tCK(min); DQ, DM and DQS inputs changing once per clock cycle ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D AC TIMING REQUIREMENTS Absolute Specifications (VDD, VDDQ = +2.5 V ±0.1 V@-4) PARAMETER DQ output access time for CLK,/CLK DQS output access time for CLK,/CLK CLK high-level width CLK low-level width CLK half period CLK cycle time CL=3 CL=2.5 CL=2 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D AC TIMING REQUIREMENTS Absolute Specifications (VDD, VDDQ = +2.5 V ±0.1 V@-4) PARAMETER ACTIVE to ACTIVE/Auto Refresh command period Auto Refresh to Active/Auto ACTIVE to READ or WRITE delay PRECHARGE command period Active to Autoprecharge Delay ACTIVE bank A to ACTIVE bank B command Write recovery time Auto Precharge write recovery + precharge time ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D AC TIMING REQUIREMENTS Absolute Specifications (VDD, VDDQ = +2.5 V ±0.2 V@-5/-6) PARAMETER DQ output access time for CLK,/CLK DQS output access time for CLK,/CLK CLK high-level width CLK low-level width CLK half period CLK cycle time CL=3 CL=2.5 CL=2 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D AC TIMING REQUIREMENTS Absolute Specifications (VDD, VDDQ = +2.5 V ±0.2 V@-5/-6) PARAMETER ACTIVE to ACTIVE/Auto Refresh command period Auto Refresh to Active/Auto ACTIVE to READ or WRITE delay PRECHARGE command period Active to Autoprecharge Delay ACTIVE bank A to ACTIVE bank B command Write recovery time Auto Precharge write recovery + precharge time ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D Notes 1. All voltages referenced to Vss. 2. Tests for AC timing, IDD, and electrical, AC and DC characteristics, may be conducted at nominal reference/supply voltage levels, but the related specifications and device operation are guaranteed for the full voltage range specified timing and IDD tests may use a VIL to VIH swing 1.5V in the test environment, but input timing is still referenced to VREF (or to the crossing point for CK//CK), and parameter specifications are guaranteed for the specified AC input levels un- der normal use conditions ...
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... MHz 6 IS43R86400D-6BL IS43R86400D-6TL Industrial Range: -40°C to +85°C Frequency Speed (ns) Order Part No. 200 MHz 5 IS43R86400D-5BLI IS43R86400D-5TLI 166 MHz 6 IS43R86400D-6BLI IS43R86400D-6TLI 32Mx16 ORDERING INFORMATION - VDD = 2.5V/2.6V Commercial Range: 0°C to +70°C Frequency Speed (ns) Order Part No. 250 MHz 4 IS43R16320D-4BL IS43R16320D-4TL 200 MHz 5 IS43R16320D-5BL ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D 16Mx32 ORDERING INFORMATION - VDD = 2.5V/2.6V Commercial Range: 0°C to +70°C Frequency Speed (ns) Order Part No. 200 MHz 5 IS43R32160D-5BL 166 MHz 6 IS43R32160D-6BL Industrial Range: -40°C to +85°C Frequency Speed (ns) Order Part No. 200 MHz 5 IS43R32160D-5BLI 166 MHz 6 IS43R32160D-6BLI Automotive (A1) Range: -40°C to +85°C ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D Integrated Silicon Solution, Inc. Rev. 00A 09/14/09 31 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D Mini Ball Grid Array Package Code: B (60-Ball) 8mm x 13mm 32 Integrated Silicon Solution, Inc. Rev. 00A 09/14/09 ...
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... IS43R86400D IS43/46R16320D, IS43/46R32160D Integrated Silicon Solution, Inc. Rev. 00A 09/14/09 33 ...