74LVT574PW NXP Semiconductors, 74LVT574PW Datasheet - Page 8

• Manufacturer Part Number: 74LVT574PW
• Description: Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP Tube
• Manufacturer: NXP Semiconductors

Specifications of 74LVT574PW

• Package: 20TSSOP
• Logic Function: D-Type Bus Interface
• Logic Family: LVT
• Number Of Element Outputs: 8
• Output Signal Type: Single-Ended
• Output Type: 3-State
• Number Of Output Enables Per Element: 1
• Typical Operating Supply Voltage: 3.3 V
• Operating Temperature: -40 to 85 °C

NXP Semiconductors
11. Waveforms
74LVT_LVTH574_4
Product data sheet
Fig 6.
Fig 7.
Fig 9.
Qn output
OE input
GND
GND
Measurement points are given in
V
Propagation delay clock input (CP) to output (Qn), pulse width clock (CP) and maximum clock frequency
Measurement points are given in
V
with the output load.
Output enable time to HIGH-state and output
disable time from HIGH-state
Measurement points are given in
Remark: The shaded areas indicate when the input is permitted to change for predictable output performance.
Data setup and hold times
V
OL
OH
OL
V
I
and V
and V
OH
OH
are typical voltage output levels that occur with the output load.
are typical voltage output levels that occur
V
M
t
PZH
CP input
Dn input
Qn output
CP input
V
M
GND
GND
GND
V
V
V
V
l
l
OH
OL
V
Table 8
Table 8
Table 8
V
I
M
t
PHZ
001aae468
Rev. 04 — 11 September 2008
t
V
V
su(H)
M
Y
V
M
t
PHL
t
WH
V
t
h(H)
M
V
M
1/f
V
M
max
Fig 8.
t
WL
Qn output
OE input
74LVT574; 74LVTH574
3.0 V
GND
Measurement points are given in
V
with the output load.
Output enable time to LOW-state and output
disable time from LOW-state
V
OL
OL
V
I
and V
V
t
t
su(L)
M
PLH
OH
3.3 V octal D-type flip-flop; 3-state
are typical voltage output levels that occur
t
V
001aac445
V
h(L)
V
M
M
t
M
PZL
001aac738
V
M
Table 8
V
M
© NXP B.V. 2008. All rights reserved.
t
PLZ
001aae469
V
X
8 of 16