EPM1270F256C5N Altera, EPM1270F256C5N Datasheet - Page 33

• Manufacturer Part Number: EPM1270F256C5N
• Description: IC MAX II CPLD 1270 LE 256-FBGA
• Manufacturer: Altera
• Series: MAX® IIr

Specifications of EPM1270F256C5N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 6.2ns
• Voltage Supply - Internal: 2.5V, 3.3V
• Number Of Logic Elements/blocks: 1270
• Number Of Macrocells: 980
• Number Of I /o: 212
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-FBGA
• Voltage: 2.5V, 3.3V
• Memory Type: FLASH
• Number Of Logic Elements/cells: 1270
• Cpld Type: FLASH
• No. Of Macrocells: 980
• No. Of I/o's: 212
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 1.2ns
• Frequency: 304MHz
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• For Use With: 544-2380 - KIT DEV MAXII W/EPM 1270N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 544-1336; EPM1270F256C5N

Chapter 2: MAX II Architecture
I/O Structure
Figure 2–20. Row I/O Block Connection to the Interconnect
Note to
(1) Each of the seven IOEs in the row I/O block can have one data_out or fast_out output, one OE output, and one data_in input.
© October 2008 Altera Corporation
Figure
2–20:
LAB Local
Interconnect
Figure 2–20
R4 Interconnects
to Adjacent LAB
Interconnect
Direct Link
LAB
shows how a row I/O block connects to the logic array.
from Adjacent LAB
Interconnect
C4 Interconnects
Direct Link
data_in[6..0]
(Note 1)
LAB Column
clock [3..0]
I/O Block Local
Interconnect
data_out
7
7
fast_out
7
7
[6..0]
[6..0]
[6..0]
OE
Contains up to
Row I/O Block
I/O Block
Seven IOEs
Row
MAX II Device Handbook
2–25