EPM2210F256I5 Altera, EPM2210F256I5 Datasheet - Page 27
![IC MAX II CPLD 2210 LE 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EPM2210F256I5
Manufacturer Part Number
EPM2210F256I5
Description
IC MAX II CPLD 2210 LE 256-FBGA
Manufacturer
Altera
Series
MAX® IIr
Specifications of EPM2210F256I5
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.0ns
Voltage Supply - Internal
2.5V, 3.3V
Number Of Logic Elements/blocks
2210
Number Of Macrocells
1700
Number Of I /o
204
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
2.5V, 3.3V
Memory Type
FLASH
Number Of Logic Elements/cells
2210
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-2267
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM2210F256I5N
Manufacturer:
ALTERA
Quantity:
648
Part Number:
EPM2210F256I5N
Manufacturer:
ALTERA
Quantity:
20 000
Chapter 2: MAX II Architecture
User Flash Memory Block
Figure 2–15. UFM Block and Interface Signals
UFM Storage
© October 2008 Altera Corporation
■
■
Each device stores up to 8,192 bits of data in the UFM block.
size, sector, and address sizes for the UFM block.
Table 2–3. UFM Array Size
There are 512 locations with 9-bit addressing ranging from 000h to 1FFh. Sector 0
address space is 000h to 0FFh and Sector 1 address space is from 100h to 1FFh. The
data width is up to 16 bits of data. The Quartus II software automatically creates logic
to accommodate smaller read or program data widths. Erasure of the UFM involves
individual sector erasing (that is, one erase of sector 0 and one erase of sector 1 is
required to erase the entire UFM block). Since sector erase is required before a
program or write, having two sectors enables a sector size of data to be left untouched
while the other sector is erased and programmed with new data.
EPM240
EPM570
EPM1270
EPM2210
Device
Auto-increment addressing
Serial interface to logic array with programmable interface
PROGRAM
OSC_ENA
DRSHFT
ARSHFT
ERASE
DRCLK
ARCLK
DRDin
ARDin
Total Bits
8,192
Address
Register
9
UFM Block
16
Data Register
OSC
(4,096 bits/sector)
UFM Sector 1
UFM Sector 0
Program
Control
Erase
Sectors
16
2
: _
4
RTP_BUSY
BUSY
OSC
DRDout
Address Bits
9
Table 2–3
MAX II Device Handbook
shows the data
Data Width
16
2–19