CY7C375I-66AC Cypress Semiconductor Corp, CY7C375I-66AC Datasheet - Page 6

IC CPLD 128 MACROCELL 160LQFP

CY7C375I-66AC

Manufacturer Part Number
CY7C375I-66AC
Description
IC CPLD 128 MACROCELL 160LQFP
Manufacturer
Cypress Semiconductor Corp
Series
Ultralogic™r
Datasheets

Specifications of CY7C375I-66AC

Memory Type
CMOS
Programmable Type
In-System Reprogrammable™ (ISR™) CMOS
Delay Time Tpd(1) Max
20.0ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
128
Number Of I /o
128
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-LQFP
Voltage
5V
Family Name
FLASH370i
# Macrocells
128
Number Of Usable Gates
3200
Frequency (max)
100MHz
Propagation Delay Time
20ns
Number Of Logic Blocks/elements
8
# I/os (max)
128
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
160
Package Type
TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1473
Electrical Characteristics
Capacitance
Notes:
Document #: 38-03029 Rev. **
10. Measured with 16-bit counter programmed into each logic block.
11. C
3.
4.
5.
6.
7.
8.
9.
V
V
V
V
V
I
I
I
I
I
I
I
I
C
C
IX
OZ
OS
CC
BHL
BHH
BHLO
BHHO
Parameter
OH
OHZ
OL
IH
IL
I/O
CLK
See the last page of this specification for Group A subgroup testing information.
If V
I
When the I/O is three-stated, the bus-hold circuit can weakly pull the I/O to a maximum of 4.0V if no leakage current is allowed. This voltage is lowered significantly
by a small leakage current. Note that all I/Os are three-stated during ISR programming. Refer to the application note “Understanding Bus Hold” for additional
information.
These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.
Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. V
problems caused by tester ground degradation.
Tested initially and after any design or process changes that may affect these parameters.
OH
[11]
Parameter
I/O
CCIO
= –2 mA, I
for dedicated inputs, and for I/O pins with JTAG functionality is 12 pF,and for the ISR
is not specified, the device can be operating in either 3.3V or 5V I/O mode; V
OL
Output HIGH Voltage
Output HIGH Voltage
with Output Disabled
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
Output Leakage Current V
Output Short
Circuit Current
Power Supply
Current
Input Bus Hold LOW
Sustaining Current
Input Bus Hold HIGH
Sustaining Current
Input Bus Hold LOW
Overdrive Current
Input Bus Hold HIGH
Overdrive Current
[9]
= 2 mA for SDO.
Description
Input/Output Capacitance
Clock Signal Capacitance
[10]
[8, 9]
Description
Over the Operating Range
[9]
V
V
V
Guaranteed Input Logical HIGH voltage for all inputs
Guaranteed Input Logical LOW voltage for all inputs
V
V
V
V
f = 1 MHz, V
V
V
V
V
CC
CC
CC
I
CC
CC
CC
CC
CC
CC
CC
CC
= Internal GND, V
= Max., V
= Min.
= Max. I
= Min.
= Max., V
= Max., V
= Max., I
= Min., V
= Min., V
= Max.
= Max.
V
V
IN
IN
IN
OUT
I
I
I
I
I
IL
IH
O
OH
OH
OH
OH
OL
OL
O
OUT
= 5.0V at f=1 MHz
= 5.0V at f = 1 MHz
= GND, V
= 0.8V
= GND or V
= 2.0V
= 3.3V, Output Disabled
= 16 mA (Com’l/Ind)
= 12 mA (Mil)
= –3.2 mA (Com’l/Ind)
= –2.0 mA (Mil)
= 0 A (Com’l/Ind)
= –50 A (Com’l/Ind)
Test Conditions
[3, 4]
= 0 mA,
Test Conditions
= 0.5V
I
= V
CC
CC
O
CC
= V
=V
EN
CCINT
CC
pin is 15 pF Max.
, Output Disabled
[5, 6]
.
Com’l/Ind.
Com’l “L” –66
Military
[5]
[5, 6]
[5]
[6]
Min.
OUT
5
[7]
[7]
= 0.5V has been chosen to avoid test
Min.
–0.5
–10
–50
–30
+75
–75
2.4
2.0
0
Max.
12
8
Typ.
–70
125
125
75
CY7C375i
Max.
–125
–160
+500
–500
+10
+50
200
125
250
4.0
3.6
0.5
7.0
0.8
Page 6 of 17
Unit
pF
pF
Unit
mA
mA
mA
mA
V
V
V
V
V
V
V
V
A
A
A
A
A
A
A

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