ADSP-BF532SBSTZ400 Analog Devices Inc, ADSP-BF532SBSTZ400 Datasheet - Page 25

• Manufacturer Part Number: ADSP-BF532SBSTZ400
• Description: IC DSP CTLR 16BIT 400MHZ 176LQFP
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: Fixed Pointr

Specifications of ADSP-BF532SBSTZ400

• Interface: SPI, SSP, UART
• Clock Rate: 400MHz
• Non-volatile Memory: ROM (1 kB)
• On-chip Ram: 84kB
• Voltage - I/o: 1.8V, 2.5V, 3.3V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 176-LQFP
• No. Of Bits: 16 Bit
• Frequency: 400MHz
• Supply Voltage: 1.2V
• Embedded Interface Type: PPI, SPI, UART
• No. Of I/o's: 16
• Supply Voltage Range: 0.8V To 1.45V, 1.75V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BF533-EZLITE - KIT W/BOARD EVAL FOR ADSP-BF533
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Silicon Anomaly List
45.
DESCRIPTION:
The DCPLB_FAULT_ADDR MMR register may be corrupted. For this to happen, an aborted data memory access must generate BOTH a
protection exception and a stall (due to either a dual-DAG collision, addressing of cacheable memory and missing, or simply fetching
from L2).
WORKAROUND:
1) Immediately return from the data exception handler upon an initial entry into the handler (without any servicing yet), and then trust
the DCPLB_FAULT_ADDR upon a second pass through the same data CPLB exception handler. Unless the cause is an exception that is
serviced, the exception will be regenerated and cause a second pass. In the second pass, however, the DCPLB_FAULT_ADDR register will
be correct because it is never generated incorrectly immediately after returning from an exception handler. To ensure that the same
exception is being responded to in the second pass (rather than a higher priority exception), a copy of the RETX register should be
acquired in the first pass and compared against in the second pass.
OR
2) Be tolerant of the artifacts generated by misprocessing the exception. For the three types of data memory exceptions - protection
violation, CPLB miss, and CPLB multiple hit - the recommended software workaround is as follows:
a) For data protection exceptions, use the DCPLB_STATUS register rather than the DCPLB_FAULT_ADDR register in the handler. This will
provide the page of the protection violation rather than the full address of the exception. Although not ideal, this likely provides sufficient
information.
b) For data CPLB miss exceptions, use the DCPLB_FAULT_ADDR register, but be warned that the address reported in this register might
be that of a previously canceled speculative exception rather than the true current exception. It might therefore:
For case i), although a CPLB miss handler might create a redundant CPLB entry (unless further page checking is done), this may be
tolerated if a multiple CPLB hit handler exists to remove this rarely generated redundant page descriptor.
For case ii), since the DCPLB_FAULT_ADDR register will never be incorrect immediately after returning from the exception handler,
nonsensical addressees can be ignored by the CPLB miss handler without generating an infinite exception handler loop due to
repetitively faulty DCPLB_FAULT_ADDR register contents.
c) For data CPLB multiple hit exceptions, have such a handler thanks to the issue described above. Don't count on multiple CPLB
exceptions never occurring.
The VisualDSP++ Blackfin Runtime Libraries include a workaround for this anomaly. The workaround ignores DCPLB miss exceptions the
first time they are raised from a particular PC. The fault address is guaranteed to be correct the second time.
APPLIES TO REVISION(S):
0.3, 0.4
05000261 - DCPLB_FAULT_ADDR MMR Register May Be Corrupted:
ii) point to an address which will never actually be fetched.
i) point to a page which already has a loaded descriptor.
OR
NR003532D | Page 25 of 45 | July 2008
ADSP-BF531/BF532/BF533