ADSP-2188MKST-300 Analog Devices Inc, ADSP-2188MKST-300 Datasheet - Page 23

IC DSP CONTROLLER 16BIT 100LQFP

ADSP-2188MKST-300

Manufacturer Part Number
ADSP-2188MKST-300
Description
IC DSP CONTROLLER 16BIT 100LQFP
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2188MKST-300

Rohs Status
RoHS non-compliant
Interface
Host Interface, Serial Port
Clock Rate
75MHz
Non-volatile Memory
External
On-chip Ram
256kB
Voltage - I/o
3.30V
Voltage - Core
2.50V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
75MHz
Mips
75
Device Input Clock Speed
75MHz
Ram Size
256KB
Operating Supply Voltage (typ)
2.75/3.3V
Operating Supply Voltage (min)
2.61V
Operating Supply Voltage (max)
2.89/3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-2188MKST-300
Quantity:
5
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have stopped
driving and started a transition from the measured output high
or low voltage to a high impedance state. The output disable
time (t
in the Output Enable/Disable diagram. The time is the interval
from when a reference signal reaches a high or low voltage level
to when the output voltages have changed by 0.5 V from the
measured output high or low voltage.
The decay time, t
C
approximated by the following equation:
from which
is calculated. If multiple pins (such as the data bus) are disabled,
the measurement value is that of the last pin to stop driving.
L
, and the current load, i
DIS
) is the difference of t
OUTPUT
INPUT
DECAY
t
DIS
t
DECAY
, is dependent on the capacitive load,
= t
L
MEASURED
, on the output pin. It can be
=
MEASURED
C
L
× 0 5 . V
i
– t
L
DECAY
and t
0.8V
1.5V
1.5V
2.0V
DECAY
, as shown
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to when they start driving.
The output enable time (t
ence signal reaches a high or low voltage level to when the output
has reached a specified high or low trip point, as shown Figure
19. If multiple pins (such as the data bus) are enabled, the mea-
surement value is that of the first pin to start driving.
REFERENCE
OUTPUT
(MEASURED)
(MEASURED)
SIGNAL
V
V
OL
OUTPUT
OH
OUTPUT STOPS
t
PIN
t
TO
MEASURED
DIS
DRIVING
50pF
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
V
V
OH
OL
t
DECAY
ENA
(MEASURED) +0.5V
(MEASURED) – 0.5V
) is the interval from when a refer-
I
I
OL
OH
ADSP-2188M
1.0V
2.0V
OUTPUT
DRIVING
STARTS
t
ENA
1.5V
V
(MEASURED)
V
(MEASURED)
OH
OL

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