ADSP-2188NBCA-320 Analog Devices Inc, ADSP-2188NBCA-320 Datasheet - Page 16
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ADSP-2188NBCA-320
Manufacturer Part Number
ADSP-2188NBCA-320
Description
IC DSP 16BIT 80MHZ 144CSPBGA
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet
1.ADSP-2185NKSTZ-320.pdf
(48 pages)
Specifications of ADSP-2188NBCA-320
Rohs Status
RoHS non-compliant
Interface
Host Interface, Serial Port
Clock Rate
80MHz
Non-volatile Memory
External
On-chip Ram
256kB
Voltage - I/o
1.8V, 2.5V, 3.3V
Voltage - Core
1.90V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-CSPBGA
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
80MHz
Mips
80
Device Input Clock Speed
80MHz
Ram Size
256KB
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
2/3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
CSPBGA
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-2188NBCA-320
Manufacturer:
SEMIKRON
Quantity:
230
ADSP-218xN
The VisualDSP++ IDE lets programmers define and manage
DSP software development. The dialog boxes and property
pages let programmers configure and manage all of the ADSP-
218xN development tools, including the syntax highlighting in
the VisualDSP++ editor. This capability controls how the devel-
opment tools process inputs and generate outputs.
The ADSP-2189M EZ-KIT Lite
cost-effective method for initial evaluation of the powerful
ADSP-218xN DSP family architecture. The ADSP-2189M EZ-
KIT Lite includes a stand-alone ADSP-2189M DSP board sup-
ported by an evaluation suite of VisualDSP++. With this EZ-
KIT Lite, users can learn about DSP hardware and software
development and evaluate potential applications of the ADSP-
218xN series. The ADSP-2189M EZ-KIT Lite provides an evalu-
ation suite of the VisualDSP++ development environment with
the C compiler, assembler, and linker. The size of the DSP exe-
cutable that can be built using the EZ-KIT Lite tools is limited to
8K words.
The EZ-KIT Lite includes the following features:
The ADSP-218x EZ-ICE
more cost-effective method for engineers to develop and opti-
mize DSP systems, shortening product development cycles for
faster time-to-market. ADSP-218xN series members integrate
on-chip emulation support with a 14-pin ICE-Port interface.
This interface provides a simpler target board connection that
requires fewer mechanical clearance considerations than other
ADSP-2100 Family EZ-ICEs. ADSP-218xN series members
need not be removed from the target system when using the EZ-
ICE, nor are any adapters needed. Due to the small footprint of
the EZ-ICE connector, emulation can be supported in final
board designs.The EZ-ICE performs a full range of functions,
including:
†
‡
EZ-KIT Lite is a registered trademark of Analog Devices, Inc.
EZ-ICE is a registered trademark of Analog Devices, Inc.
• Fill and dump memory
• Source level debugging
• 75 MHz ADSP-2189M
• Full 16-Bit Stereo Audio I/O with AD73322 Codec
• RS-232 Interface
• EZ-ICE Connector for Emulator Control
• DSP Demonstration Programs
• Evaluation Suite of VisualDSP++
• In-target operation
• Up to 20 breakpoints
• Single-step or full-speed operation
• Registers and memory values can be examined and altered
• PC upload and download functions
• Instruction-level emulation of program booting
and execution
®‡
Emulator provides an easier and
®†
provides developers with a
Rev. A | Page 16 of 48 | August 2006
Designing an EZ-ICE-Compatible System
ADSP-218xN series members have on-chip emulation support
and an ICE-Port, a special set of pins that interface to the EZ-
ICE. These features allow in-circuit emulation without replac-
ing the target system processor by using only a 14-pin
connection from the target system to the EZ-ICE. Target sys-
tems must have a 14-pin connector to accept the EZ-ICE’s in-
circuit probe, a 14-pin plug.
Note: The EZ-ICE uses the same V
used for V
series members are tolerant to input voltages up to 3.6 V,
regardless of the value of V
ICE must not exceed 3.3 V.
Issuing the chip reset command during emulation causes the
DSP to perform a full chip reset, including a reset of its memory
mode. Therefore, it is vital that the mode pins are set correctly
PRIOR to issuing a chip reset command from the emulator user
interface. If a passive method of maintaining mode information
is being used (as discussed in
it does not matter that the mode information is latched by an
emulator reset. However, if the RESET pin is being used as a
method of setting the value of the mode pins, the effects of an
emulator reset must be taken into consideration.
One method of ensuring that the values located on the mode
pins are those desired is to construct a circuit like the one shown
in
pin to logic high, regardless of whether it is latched via the
RESET or ERESET pin.
The ICE-Port interface consists of the following ADSP-218xN
pins: EBR, EINT, EE, EBG, ECLK, ERESET, ELIN, EMS, and
ELOUT.
These ADSP-218xN pins must be connected only to the EZ-ICE
connector in the target system. These pins have no function
except during emulation, and do not require pull-up or pull-
down resistors. The traces for these signals between the
ADSP-218xN and the connector must be kept as short as possi-
ble, no longer than 3 inches.
The following pins are also used by the EZ-ICE: BR, BG, RESET,
and GND.
• Complete assembly and disassembly of instructions
• C source-level debugging
Figure
15. This circuit forces the value located on the Mode A
DDEXT
. Because the input pins of the ADSP-218xN
Figure 15. Mode A Pin/EZ-ICE Circuit
1k
DDEXT
Setting Memory Mode on Page
, the voltage setting for the EZ-
PROGRAMMABLE I/O
MODE A/PF0
ERESET
RESET
DD
ADSP-218xN
voltage as the V
DD
voltage
5),