EP1K100QC208-1N Altera, EP1K100QC208-1N Datasheet - Page 27
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EP1K100QC208-1N
Manufacturer Part Number
EP1K100QC208-1N
Description
IC ACEX 1K FPGA 100K 208-PQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet
1.EP1K10TC100-3N.pdf
(86 pages)
Specifications of EP1K100QC208-1N
Number Of Logic Elements/cells
4992
Number Of Labs/clbs
624
Total Ram Bits
49152
Number Of I /o
147
Number Of Gates
257000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Logic Type
Programmable Logic Device (PLD)
No. Of I/o's
147
Frequency
180MHz
Supply Current Max
25mA
Operating Temperature Range
0°C To +70°C
Logic Case Style
QFP
No. Of Pins
208
Rohs Compliant
Yes
Family Name
ACEX™ 1K
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4992
# I/os (max)
147
Frequency (max)
333.33MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
4992
Ram Bits
49152
Device System Gates
257000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Clock Management
PLL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1823
EP1K100QC208-1N
EP1K100QC208-1N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1K100QC208-1N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
Figure 13. ACEX 1K LAB Connections to Row & Column Interconnect
Row Channels
Each LE can drive two
row channels.
LE 1
LE 2
LE 8
At each intersection,
six row channels can
drive column channels.
To LAB Local
Interconnect
Each LE can switch
interconnect access
with an LE in the
adjacent LAB.
ACEX 1K Programmable Logic Device Family Data Sheet
To Other Rows
Channels
Column
From Adjacent LAB
To Adjacent LAB
To Other
Columns
27
13