XC5VLX110-1FFG676C Xilinx Inc, XC5VLX110-1FFG676C Datasheet - Page 271
![IC FPGA VIRTEX-5 110K 676FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX110-1FFG676C
Manufacturer Part Number
XC5VLX110-1FFG676C
Description
IC FPGA VIRTEX-5 110K 676FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX110-1FFG676C
Total Ram Bits
4718592
Number Of Logic Elements/cells
110592
Number Of Labs/clbs
8640
Number Of I /o
440
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA, FCBGA
No. Of Logic Blocks
17280
No. Of Gates
110000
Family Type
Virtex-5 LX
No. Of Speed Grades
1
No. Of I/o's
440
Clock Management
PLL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1557
Available stocks
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- XC5VLX30-1FFG324C PDF datasheet
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- Download datasheet (14Mb)
X-Ref Target - Figure 6-63
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
External Termination
DCI
HSTL_IV_DCI_18
HSTL Class IV (1.8V)
HSTL_IV_18
Figure 6-63: HSTL Class IV (1.8V) with Unidirectional Termination
Figure 6-63
for HSTL Class IV (1.8V).
Figure 6-64
for HSTL Class IV (1.8V).
IOB
R
VRP
= Z 0 = 50Ω
V
shows a sample circuit illustrating a valid unidirectional termination technique
V
shows a sample circuit illustrating a valid bidirectional termination technique
TT
CCO
= 1.8V
R P = Z 0 = 50Ω
= 1.8V
IOB
www.xilinx.com
Z 0
R P = Z 0 = 50Ω
Z 0
Specific Guidelines for I/O Supported Standards
V
TT
IOB
V
= 1.8V
CCO
R
= 1.8V
VRP
IOB
= Z 0 = 50Ω
V
REF
V
REF
= 1.1V
= 1.1V
HSTL_IV_DCI_18
HSTL_IV_18
+
–
ug190_6_60_030306
+
–
271
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