EP4CE40F29C7N Altera, EP4CE40F29C7N Datasheet - Page 5
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EP4CE40F29C7N
Manufacturer Part Number
EP4CE40F29C7N
Description
IC CYCLONE IV E FPGA 40K 780FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CE40F29C7N
Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1134000
Number Of I /o
532
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2685
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4CE40F29C7N
Manufacturer:
ALTERA
Quantity:
852
Part Number:
EP4CE40F29C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 1: Cyclone IV Device Datasheet
Operating Conditions
Table 1–3. Recommended Operating Conditions for Cyclone IV E Devices
Table 1–4. Recommended Operating Conditions for Cyclone IV GX Devices (Part 1 of 2)—Preliminary
© December 2010 Altera Corporation
I
Notes to
(1) Cyclone IV E 1.0 V core voltage devices only support C8L, C9L, and I8L speed grades. Cyclone IV E 1.2 V core voltage devices only support C6,
(2) V
(3) V
(4) V
(5) The POR time for Standard POR ranges between 50 and 200 ms. Each individual power supply must reach the recommended operating range
(6) The POR time for Fast POR ranges between 3 and 9 ms. Each individual power supply must reach the recommended operating range within 3 ms.
V
V
V
V
V
(3),(5),
V
V
Diode
CCINT
CCA
CCD_PLL
CCIO
CC_CLKIN
CCH_GXB
CCA_GXB
Symbol
Symbol
C7, C8, I7, and A7 speed grades.
must be powered up and powered down at the same time.
within 50 ms.
(1),(3)
(3),
CCIO
CC
CCIO
(3)
(2)
must rise monotonically.
(6)
Table
for all I/O banks must be powered up during device operation. All VCCA pins must be powered to 2.5 V (even when PLLs are not used) and
powers all input buffers.
(4)
1–3:
Core voltage, PCIe hard IP block, and
transceiver PCS power supply
PLL analog power supply
PLL digital power supply
I/O banks power supply for 3.3
operation
I/O banks power supply for 3.0
operation
I/O banks power supply for 2.5
operation
I/O banks power supply for 1.8
operation
I/O banks power supply for 1.5
operation
I/O banks power supply for 1.2
operation
Differential clock input pins power
supply for 3.3
Differential clock input pins power
supply for 3.0
Differential clock input pins power
supply for 2.5
Differential clock input pins power
supply for 1.8
Differential clock input pins power
supply for 1.5
Differential clock input pins power
supply for 1.2
Transceiver output buffer power supply
Transceiver PMA and auxiliary power
supply
Magnitude of DC current across
PCI-clamp diode when enable
Parameter
- V operation
- V operation
- V operation
- V operation
- V operation
- V operation
Parameter
- V
- V
- V
- V
- V
- V
Conditions
—
Conditions
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(Note
1),
Min
—
(2)
(Part 2 of 2)
2.375
3.135
2.375
1.425
3.135
2.375
1.425
2.375
2.375
1.16
1.16
2.85
1.71
1.14
2.85
1.71
1.14
Min
Cyclone IV Device Handbook, Volume 3
Typ
—
Typ
1.2
2.5
1.2
3.3
2.5
1.8
1.5
1.2
3.3
2.5
1.8
1.5
1.2
2.5
2.5
3
3
Max
10
2.625
3.465
2.625
1.575
3.465
2.625
1.575
2.625
2.625
1.24
1.24
3.15
1.89
1.26
3.15
1.89
1.26
Max
Unit
Unit
mA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1–5