EP4CE55F23C8N Altera, EP4CE55F23C8N Datasheet - Page 140

• Manufacturer Part Number: EP4CE55F23C8N
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C8N

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Cyclone IV
• Number Of Logic Blocks/elements: 55856
• # I/os (max): 324
• Logic Cells: 55856
• Ram Bits: 2396160
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

6–32
Cyclone IV Device Handbook, Volume 1
1
Figure 6–16
output buffers and external resistors.
Figure 6–16. RSDS, Mini-LVDS, or PPDS Interface with External Resistor Network on the Top and
Bottom I/O Banks
Note to
(1) R
A resistor network is required to attenuate the output voltage swing to meet RSDS,
mini-LVDS, and PPDS specifications when using emulated transmitters. You can
modify the resistor network values to reduce power or improve the noise margin.
The resistor values chosen must satisfy
Equation 6–1. Resistor Network
Altera recommends that you perform simulations using Cyclone IV devices IBIS
models to validate that custom resistor values meet the RSDS, mini-LVDS, or PPDS
requirements.
It is possible to use a single external resistor instead of using three resistors in the
resistor network for an RSDS interface, as shown in
single-resistor solution reduces the external resistor count while still achieving the
required signaling level for RSDS. However, the performance of the single-resistor
solution is lower than the performance with the three-resistor network.
S
and R
Figure
Emulated RSDS,
Mini-LVDS, or PPDS
Transmitter
P
Cyclone IV Device
values are pending characterization.
6–16:
shows an RSDS, mini-LVDS, or PPDS interface with two single-ended
(Note 1)
Resistor Network
R
R
S
S
R
R
-------------------
R
P
S
S
Equation

+
R
----- -
R
----- -
2
2
P
P
=
50 
6–1.
50 Ω
50 Ω
Chapter 6: I/O Features in Cyclone IV Devices
Figure
100 Ω
© December 2010 Altera Corporation
6–17. The external
High-Speed I/O Standards Support
RSDS, Mini-LVDS,
or PPDS Receiver