EP3CLS70F484I7N Altera, EP3CLS70F484I7N Datasheet - Page 20
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP3CLS70F484I7N
Manufacturer Part Number
EP3CLS70F484I7N
Description
IC FPGA CYCIII LS 70K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3CLS70F484I7N.pdf
(274 pages)
Specifications of EP3CLS70F484I7N
Number Of Logic Elements/cells
70208
Number Of Labs/clbs
4388
Total Ram Bits
3068928
Number Of I /o
278
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Family Name
Cyclone III LS
Number Of Logic Blocks/elements
70208
# I/os (max)
278
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
70208
Ram Bits
3068928
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1–10
Table 1–10. Cyclone III Devices Internal Weak Pull-Up and Weak Pull-Down Resistor
Cyclone III Device Handbook, Volume 2
R
R
Notes to
(1) All I/O pins have an option to enable weak pull-up except configuration, test, and JTAG pin. Weak pull-down feature is only available for JTAG
(2) Pin pull-up resistance values may be lower if an external source drives the pin higher than V
(3) R
(4) R
_P U
_P D
Symbol
TCK.
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 125°C; V
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 125°C; V
_P U
_P D
Table
= (V
= V
I
/I
CCIO
R_PD
Value of I/O pin pull-up resistor before
and during configuration, as well as
user mode if the programmable
pull-up resistor option is enabled
Value of I/O pin pull-down resistor
before and during configuration
1–10:
– V
I
)/I
R_PU
Internal Weak Pull-Up and Weak Pull-Down Resistor
Table 1–10
devices.
Hot Socketing
Table 1–11
Table 1–11. Cyclone III Devices Hot-Socketing Specifications
Schmitt Trigger Input
Cyclone III devices support Schmitt trigger input on TDI, TMS, TCK, nSTATUS,
nCONFIG, nCE, CONF_DONE, and DCLK pins. A Schmitt trigger feature introduces
hysteresis to the input signal for improved noise immunity, especially for signal with
slow edge rate.
range for Schmitt trigger inputs in Cyclone III devices.
I
I
Note to
(1) The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN| = C
IOPIN(DC )
IOPIN(A C)
CC IO
CC IO
Parameter
dv/dt, in which C is I/O pin capacitance and dv/dt is the slew rate.
CC IO
= V
CC IO
= V
CCIO
CCIO
Symbol
Table
C C
C C
= V
= V
= V
= V
, V
, V
C C
C C
I
CC
I
CC
lists the hot-socketing specifications for Cyclone III devices.
lists the weak pull-up and pull-down resistor values for Cyclone III
= 0 V;
= V
1–11:
+ 5%, V
+ 5%, V
– 5% , V
– 5% , V
CC
Table 1–12
– 5% ;
I
I
I
I
= V
= 50 mV;
= 0 V; in which V
= V
DC current per I/O pin
AC current per I/O pin
CC
C C
+ 5% – 50 mV;
– 5% ; in which V
Parameter
V
V
V
V
V
V
V
V
V
V
V
lists the hysteresis specifications across supported V
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
= 3.3 V ± 5% (2),
= 3.0 V ± 5% (2),
= 2.5 V ± 5% (2),
= 1.8 V ± 5% (2),
= 1.5 V ± 5% (2),
= 1.2 V ± 5% (2),
= 3.3 V ± 5%
= 3.0 V ± 5%
= 2.5 V ± 5%
= 1.8 V ± 5%
= 1.5 V ± 5%
I
refers to the input voltage at the I/O pin.
I
Conditions
refers to the input voltage at the I/O pin.
(4)
(4)
(4)
(4)
(4)
(3)
(3)
(3)
(3)
(3)
(3)
Maximum
8 mA
300 μA
CCIO
.
(1)
(Note 1)
Chapter 1: Cyclone III Device Data Sheet
Min
10
13
19
7
7
8
6
6
6
7
8
© January 2010 Altera Corporation
Typ
143
25
28
35
57
82
19
22
25
35
50
Electrical Characteristics
Max
108
163
351
112
41
47
61
30
36
43
71
CCIO
Unit
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ