EP3CLS70F484I7N Altera, EP3CLS70F484I7N Datasheet - Page 31
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP3CLS70F484I7N
Manufacturer Part Number
EP3CLS70F484I7N
Description
IC FPGA CYCIII LS 70K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3CLS70F484I7N.pdf
(274 pages)
Specifications of EP3CLS70F484I7N
Number Of Logic Elements/cells
70208
Number Of Labs/clbs
4388
Total Ram Bits
3068928
Number Of I /o
278
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Family Name
Cyclone III LS
Number Of Logic Blocks/elements
70208
# I/os (max)
278
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
70208
Ram Bits
3068928
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Chapter 1: Cyclone III Device Data Sheet
Switching Characteristics
© January 2010 Altera Corporation
Table 1–29. Cyclone III Devices True LVDS Transmitter Timing Specifications
Table 1–30. Cyclone III Devices Emulated LVDS Transmitter Timing Specifications
of 2)
f
clock frequency)
HSIODR
t
TCCS
Output jitter
(peak to peak)
t
Notes to
(1) True LVDS transmitter is only supported at the output pin of Row I/O (Banks 1, 2, 5, and 6).
(2) t
f
frequency)
HSIODR
t
HSC LK
DUTY
LOCK
HSC LK
DUTY
(2)
Symbol
Symbol
LOC K
(input clock
(input
Table
is the time required for the PLL to lock from the end of device configuration.
1–29:
Modes
Modes
×10
×10
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
—
—
—
—
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
—
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
10
10
10
10
10
10
80
70
40
20
10
45
C6
C6
402.5
402.5
Max
420
420
420
420
420
420
840
840
840
840
840
420
200
500
Max
320
320
320
320
320
640
640
640
640
640
55
55
1
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
10
10
10
10
10
10
80
70
40
20
10
45
C7, I7
C7, I7
402.5
402.5
402.5
402.5
Max
370
370
370
370
370
740
740
740
740
740
200
500
Max
320
320
320
320
320
640
640
640
640
640
55
55
1
Cyclone III Device Handbook, Volume 2
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
10
10
10
10
10
10
80
70
40
20
10
45
C8, A7
(Note 1)
C8, A7
(Note 1)
402.5
402.5
402.5
402.5
Max
320
320
320
320
320
640
640
640
640
640
200
550
Max
275
275
275
275
275
550
550
550
550
550
55
55
1
(Part 1
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ms
%
ps
ps
%
1–21