EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 81
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EP2AGX65DF29C6N
Manufacturer Part Number
EP2AGX65DF29C6N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX65DF29C6N.pdf
(306 pages)
Specifications of EP2AGX65DF29C6N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
63250
# I/os (max)
364
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
63250
Ram Bits
5557452.8
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX65DF29C6N
Manufacturer:
ST
Quantity:
12 000
Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
Table 1–57. External Memory Interface Specifications for Arria II GX Devices
Table 1–58. DLL Frequency Range Specifications for Arria II GZ Devices (Part 1 of 2)
December 2010 Altera Corporation
Note to
(1) Low indicates a 6-bit DQS delay setting; high indicates a 5-bit DQS delay setting.
Frequency
Frequency Mode
Mode
0
1
2
3
4
5
6
Table
0
1
2
3
4
5
6
1–57:
f
110-180
140-220
170-270
220-340
270-410
320-450
90-140
Table 1–56
Arria II GZ devices at 1.25 Gbps data rate.
Table 1–56. LVDS Soft-CDR/DPA Sinusoidal Jitter Mask Values for Arria II GZ Devices at
1.25 Gbps Data Rate
External Memory Interface Specifications
For the maximum clock rate supported for Arria II GX and GZ device family, refer to
the
Table 1–57
Table 1–58
C4
External Memory Interface System
120-170
150-210
180-260
240-320
290-380
360-450
90-130
Frequency Range (MHz)
–3
Frequency Range (MHz)
lists the LVDS soft-CDR/DPA sinusoidal jitter tolerance specification for
lists the external memory interface specifications for Arria II GX devices.
lists the DLL frequency range specifications for Arria II GZ devices.
F1
F2
F3
F4
I3, C5, I5
110-170
140-210
170-260
220-310
270-380
320-410
90-130
Jitter Frequency (Hz)
120-160
150-200
180-240
240-290
290-360
360-450
90-120
–4
110-150
140-180
170-220
220-270
270-320
320-370
90-110
C6
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
Specifications.
Available Phase Shift
22.5°, 45°, 67.5°, 90°
50,000,000
36°, 72°, 108°, 144°
36°, 72°, 108°, 144°
45°, 90°, 135°, 180°
45°, 90°,135°, 180°
1,493,000
30°, 60°, 90°, 120°
30°, 60°, 90°, 120°
10,000
17,565
Resolution
22.5
(°)
30
36
45
30
36
45
Buffer Mode
DQS Delay
Buffer Mode
Sinusoidal Jitter (UI)
Low
High
High
High
DQS Delay
Low
Low
Low
(1)
High
High
High
Low
Low
Low
Low
(1)
25.000
25.000
0.350
0.350
Delay Chains
Number of
Number of
Chains
16
12
10
12
10
Delay
8
8
16
12
10
12
10
8
8
1–73