EP2SGX60EF1152C4N Altera, EP2SGX60EF1152C4N Datasheet - Page 226
![IC STRATIX II GX 60K 1152-FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP2SGX60EF1152C4N
Manufacturer Part Number
EP2SGX60EF1152C4N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX60EF1152C4N
Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
60440
# I/os (max)
534
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2183
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 226 of 316
- Download datasheet (2Mb)
Operating Conditions
4–56
Stratix II GX Device Handbook, Volume 1
Low
sustaining
current
High
sustaining
current
Low
overdrive
current
High
overdrive
current
Bus-hold
trip point
25-Ω R
3.3/2.5
50-Ω R
3.3/2.5
Parameter
Table 4–48. Bus Hold Parameters
Table 4–49. On-Chip Termination Specification for Top and Bottom I/O Banks (Part 1 of 2)
Symbol
S
S
Internal series termination with
calibration (25-Ω setting)
Internal series termination without
calibration (25-Ω setting)
Internal series termination with
calibration (50-Ω setting)
Internal series termination without
calibration (50-Ω setting)
V
(maximum)
V
(minimum)
0 V < V
V
0 V < V
V
Conditions
IN
IN
CCIO
CCIO
> V
< V
IL
IH
IN
IN
Description
<
<
–22.5
Bus Hold Specifications
Table 4–48
On-Chip Termination Specifications
Tables 4–49
resistance tolerance when using series or differential on-chip termination.
22.5
0.45
Min
1.2 V
–120
Max
0.95
120
shows the Stratix II GX device family bus hold specifications.
and
Min
–25
0.5
25
V
V
V
V
4–50
1.5 V
CCIO
CCIO
CCIO
CCIO
–160
Max
160
1.0
Conditions
define the specification for internal termination
= 3.3/2.5 V
= 3.3/2.5 V
= 3.3/2.5 V
= 3.3/2.5 V
0.68
Min
–30
V
30
CCIO
1.8 V
Level
–200
Max
1.07
200
Commercial
Max
Min
–50
±30
±30
0.7
±5
±5
50
2.5 V
Resistance Tolerance
–300
Max
300
1.7
Industrial
Altera Corporation
Max
± 30
Min
–70
±10
±30
0.8
±10
70
3.3 V
Notes
–500
Max
500
2.0
June 2009
(1),
Unit
%
%
%
%
Unit
μA
μA
μA
μA
(2)
V
Related parts for EP2SGX60EF1152C4N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![ep2sgx60e](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
4. Serial Configuration Devices Epcs1, Epcs4, Epcs16, Epcs64, And Epcs128 Data Sheet
Manufacturer:
Altera Corporation
Datasheet:
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet: