CY7C64713-56LTXC Cypress Semiconductor Corp, CY7C64713-56LTXC Datasheet - Page 32

• Manufacturer Part Number: CY7C64713-56LTXC
• Description: IC MCU USB PHERIPH FX1 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX1™r

Specifications of CY7C64713-56LTXC

• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C647xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Mounting Style: SMD/SMT
• Operating Temperature Range: 0 C to + 70 C
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-1681 - KIT USB FX1 DEVELOPMENT BOARD428-1677 - KIT DEVELOPMENT EZ-USB FX2LP428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2929

AC Electrical Characteristics
USB Transceiver
USB 2.0 compliant in full speed mode.
Table 11. Program Memory Read Parameters
Document #: 38-08039 Rev. *F
Notes
t
t
t
t
t
t
t
t
CL
AV
STBL
STBH
SOEL
SCSL
DSU
DH
12. CLKOUT is shown with positive polarity.
13. t
CLKOUT
Parameter
t
t
ACC1
ACC1
ACC1
A[15..0]
(24 MHz) = 3*t
(48 MHz) = 3*t
PSEN#
is computed from the parameters in
D[7..0]
CS#
OE#
[12]
1/CLKOUT Frequency
Delay from Clock to Valid Address
Clock to PSEN Low
Clock to PSEN High
Clock to OE Low
Clock to CS Low
Data Setup to Clock
Data Hold Time
CL
CL
– t
– t
t
AV
AV
AV
t
CL
– t
– t
DSU
DSU
t
SOEL
t
SCSL
= 106 ns
= 43 ns.
Description
Table 11
Figure 12. Program Memory Read Timing Diagram
t
STBL
t
as follows:
ACC1
[13]
data in
Min
9.6
0
0
0
0
t
STBH
t
DH
20.83
41.66
83.2
Typ
t
AV
Max
10.7
11.1
13
8
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CY7C64713
48 MHz
24 MHz
12 MHz
Notes
Page 32 of 55
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