CY7C68014A-100AXC Cypress Semiconductor Corp, CY7C68014A-100AXC Datasheet - Page 5

IC MCU USB PERIPH HI SPD 100LQFP

CY7C68014A-100AXC

Manufacturer Part Number
CY7C68014A-100AXC
Description
IC MCU USB PERIPH HI SPD 100LQFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r

Specifications of CY7C68014A-100AXC

Program Memory Type
ROMless
Package / Case
100-LQFP
Applications
USB Microcontroller
Core Processor
8051
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
40
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Processor Series
CY7C68xx
Core
8051
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C/USART/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
40
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3684
Minimum Operating Temperature
0 C
Controller Family/series
(8051) USB
Core Size
8 Bit
No. Of I/o's
40
Program Memory Size
16KB
Cpu Speed
48MHz
No. Of Timers
3
Embedded Interface Type
I2C, USART, USB
Rohs Compliant
Yes
Package
100TQFP
Device Core
8051
Family Name
FX2LP
Maximum Speed
48 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-1670

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C68014A-100AXC
Manufacturer:
Cypress Semiconductor
Quantity:
135
Part Number:
CY7C68014A-100AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
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Part Number:
CY7C68014A-100AXC
Manufacturer:
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Quantity:
20 000
The FX2LP jump instruction is encoded as follows:
Table 3. INT2 USB Interrupts
If Autovectoring is enabled (AV2EN = 1 in the INTSET-UP register), the FX2LP substitutes its INT2VEC byte. Therefore, if the high
byte (“page”) of a jump table address is preloaded at the location 0x0044, the automatically inserted INT2VEC byte at 0x0045 directs
the jump to the correct address out of the 27 addresses within the page.
3.8.3 FIFO/GPIF Interrupt (INT4)
Just as the USB Interrupt is shared among 27 individual USB interrupt sources, the FIFO/GPIF interrupt is shared among 14 individual
FIFO/GPIF sources. The FIFO/GPIF Interrupt, like the USB Interrupt, can employ autovectoring.
and INT4VEC values for the 14 FIFO/GPIF interrupt sources.
Document #: 38-08032 Rev. *M
Priority
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
11
1
2
3
4
5
6
7
8
9
INT2VEC Value
0C
1C
2C
3C
4C
5C
6C
7C
10
14
18
20
24
28
30
34
38
40
44
48
50
54
58
60
64
68
70
74
78
00
04
08
EP0-OUT
SUDAV
SOF
SUTOK
SUSPEND
USB RESET
HISPEED
EP0ACK
EP0-IN
EP1-IN
EP1-OUT
EP2
EP4
EP6
EP8
IBN
EP0PING
EP1PING
EP2PING
EP4PING
EP6PING
EP8PING
ERRLIMIT
EP2ISOERR
EP4ISOERR
EP6ISOERR
EP8ISOERR
Source
USB INTERRUPT TABLE FOR INT2
Setup Data Available
Start of Frame (or microframe)
Setup Token Received
USB Suspend request
Bus reset
Entered high speed operation
FX2LP ACK’d the CONTROL Handshake
reserved
EP0-IN ready to be loaded with data
EP0-OUT has USB data
EP1-IN ready to be loaded with data
EP1-OUT has USB data
IN: buffer available. OUT: buffer has data
IN: buffer available. OUT: buffer has data
IN: buffer available. OUT: buffer has data
IN: buffer available. OUT: buffer has data
IN-Bulk-NAK (any IN endpoint)
reserved
EP0 OUT was Pinged and it NAK’d
EP1 OUT was Pinged and it NAK’d
EP2 OUT was Pinged and it NAK’d
EP4 OUT was Pinged and it NAK’d
EP6 OUT was Pinged and it NAK’d
EP8 OUT was Pinged and it NAK’d
Bus errors exceeded the programmed limit
reserved
reserved
ISO EP2 OUT PID sequence error
ISO EP4 OUT PID sequence error
ISO EP6 OUT PID sequence error
ISO EP8 OUT PID sequence error
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Notes
Table 4
on page 6 shows the priority
Page 5 of 62
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