CY7C68013A-128AXI Cypress Semiconductor Corp, CY7C68013A-128AXI Datasheet - Page 45

IC MCU USB PERIPH HI SPD 128LQFP

CY7C68013A-128AXI

Manufacturer Part Number
CY7C68013A-128AXI
Description
IC MCU USB PERIPH HI SPD 128LQFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r

Specifications of CY7C68013A-128AXI

Program Memory Type
ROMless
Package / Case
128-LQFP
Applications
USB Microcontroller
Core Processor
8051
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
40
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY7C68xx
Core
8051
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, USART, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
40
Number Of Timers
3
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3684
Minimum Operating Temperature
- 40 C
Controller Family/series
(8051) USB
Core Size
8 Bit
No. Of I/o's
40
Program Memory Size
16KB
Cpu Speed
48MHz
No. Of Timers
3
Embedded Interface Type
I2C, USART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-1943
CY7C68013A-128AXI

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CY7C68013A-128AXI
0
10.9 Slave FIFO Synchronous Write
Table 23. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK
Table 24. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK
Document #: 38-08032 Rev. *M
t
t
t
t
t
t
t
t
t
t
t
t
IFCLK
SWR
WRH
SFD
FDH
XFLG
IFCLK
SWR
WRH
SFD
FDH
XFLG
Parameter
Parameter
IFCLK Period
SLWR to Clock Setup Time
Clock to SLWR Hold Time
FIFO Data to Clock Setup Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
IFCLK Period
SLWR to Clock Setup Time
Clock to SLWR Hold Time
FIFO Data to Clock Setup Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
FLAGS
IFCLK
SLWR
DATA
Figure 20. Slave FIFO Synchronous Write Timing Diagram
Z
Description
Description
t
SWR
t
SFD
t
IFCLK
t
WRH
t
N
t
XFLG
FDH
20.83
20.83
10.4
12.1
Min
Min
9.2
3.6
3.2
4.5
0
0
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Z
[21]
[21]
[20]
Max
Max
13.5
200
9.5
Page 45 of 62
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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