Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 16

• Manufacturer Part Number: Z9025106PSG
• Description: IC 32K 8BIT DTC OTP 42-DIP
• Manufacturer: Zilog

Specifications of Z9025106PSG

• Applications: TV Controller
• Core Processor: Z8
• Program Memory Type: OTP (32 kB)
• Controller Series: Digital Television Controller (DTC)
• Ram Size: 300 x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 27
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 42-DIP (0.600", 15.24mm)
• Processor Series: Z902x
• Core: Z8
• Data Bus Width: 8 bit
• Program Memory Size: 32 KB
• Data Ram Size: 300 B
• Interface Type: I2C
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 27
• Mounting Style: Through Hole
• On-chip Adc: 4 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Acronym
V
V
V
XTAL1, XTAL2
Acronym
P20/HLFTN
P24/SCLK0
P25/SDATA0
P26/SCLK1
P27/SDATA1
P62/ADC0
P60/ADC3
BLANK
CC
SYNC
1.3
Table 2
Multiplexed Pin Descriptions
Table 3 lists the Multiplexed Pin acronyms, pin names, and descriptions.
Table 3
Pin Name(s)
Port 2 bit 0 or Halftone Output Port 2 bit 0 can be programmed as an input or output
Port 2 bit 4 or
Port 2 bit 5 or
Port 2 bit 6 or
Port 2 bit 7 or
Port 6 bit 2 or
Analog-to-Digital Converter
Channel 0
Port 6 bit 0 or
Analog-to-Digital Converter
Channel 3
Pin Name(s)
Video Blank
Power Supply
Vertical Sync
Time-Based
Input
Output
Single-Purpose Pin Descriptions (Continued)
Multiplexed Pin Descriptions
I
I
I
I
2
2
2
2
C Clock
C Data
C Clock
C Data
Description
CMOS output, programmable polarity. This pin is used as
a super-impose control port to display characters from
video RAM. The signal controls Y-signal output of CRTs
and turns off the incoming video display while the
characters in video RAM are super-imposed on the
screen. The output ports of color data directly drive three
electron guns on the CRT; at the same time VBLANK
output turns off the Y signal.
Power supply
Input pin for external vertical synchronization signal.
These pins connect to the internal parallel-resonant clock
crystal oscillator circuit with two capacitors to GND.
XTAL1 can be used as an external clock input.
Description
line.
Port 2 bit 4 or
Port 2 bit 5 or
Port 2 bit 6 or
Port 2 bit 7 or
P62 can be read directly. A negative edge event is
latched into IRQ2 to initiate an IRQ2-vectored interrupt if
appropriately enabled.
Port 6 bit 0 can be programmed as an input or output
line.
32 KB Television Controller with OSD
I
I
I
I
2
2
2
2
C Clock
C Data
C Clock
C Data
PS001301-0800
8