Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 5

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
List of Figures
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Z90255-Based TV System Application ........................................................ 2
Z90255 Block Diagram ................................................................................ 3
Z90255 and Z90251 Pin Assignments......................................................... 5
Code Development Environment ............................................................... 10
Register File Map....................................................................................... 12
Program Memory Map ............................................................................... 14
Stop Mode Recovery Source/Level Select ................................................ 21
Positive and Negative Sync Signals .......................................................... 23
Second Color Display ................................................................................ 28
Mesh On .................................................................................................... 29
Video Fade (Example) ............................................................................... 34
Character Pixel map in CGROM................................................................ 37
Example of a Multiple Character Icon ........................................................ 38
Smoothing Effect on 2X Character Size .................................................... 39
VRAM Data Path for 512 Character Set .................................................... 42
H
Bidirectional Port Pin Pad Multiplexed with I2C Port ................................. 53
Pulse Width Modulator Timing Diagram, 6 Bit ........................................... 71
Pulse Width Modulator Timing Diagram, 14-Bit ......................................... 72
Analog Signals Generated from PWM Signals .......................................... 79
ADC Block Diagram ................................................................................... 82
Timing Requirements of External Inputs.................................................... 86
42-Lead Shrink Dual-in-line Package (SDIP) ............................................ 87
SYNC
and V
SYNC
Specification ............................................................... 52
32 KB Television Controller with OSD
PS001301-0800
v

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