AN2131SC Cypress Semiconductor Corp, AN2131SC Datasheet - Page 227

no-image

AN2131SC

Manufacturer Part Number
AN2131SC
Description
IC MCU 8051 8K RAM 24MHZ 44QFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB®r
Datasheet

Specifications of AN2131SC

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
AN213x
Ram Size
8K x 8
Interface
I²C, USB
Number Of I /o
16
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1306
AN2131SC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AN2131SC
Manufacturer:
CYPRESS
Quantity:
5 510
Part Number:
AN2131SC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
AN2131SC
Manufacturer:
CY
Quantity:
1 000
Part Number:
AN2131SC
Manufacturer:
PANASONIC
Quantity:
1 000
Part Number:
AN2131SC
Manufacturer:
CYPRESS
Quantity:
8 000
Part Number:
AN2131SC
Manufacturer:
CYPRSS
Quantity:
20 000
* See Table 12-5 for individual byte count register addresses.
The 8051 writes this register with the number of bytes it loaded into the IN endpoint
buffer INnBUF. Writing this register also arms the endpoint by setting the endpoint BSY
bit to 1.
Legal values for these registers are 0-64. A zero transfer size is used to terminate a trans-
fer that is an integral multiple of MaxPacketSize. For example, a 256-byte transfer with
maxPacketSize = 64, would require four packets of 64 bytes each plus one packet of 0
bytes.
The IN byte count should never be written while the endpoint’s BUSY bit is set.
When the register pairing feature is used (Section 6, "EZ-USB Bulk Transfers") IN2BC is
used for the EP2/EP3 pair, IN4BC is used for the EP4/EP5 pair, and IN6BC is used for the
EP6/EP7 pair. In the paired (double-buffered) mode, after the first write to the even-num-
bered byte count register, the endpoint BSY bit remains at 0, indicating that only one of
the buffers is full, and the other is still empty. The odd numbered byte count register is not
used when endpoints are paired.
Page 12-34
INnBC
R/W
b7
x
-
R/W
D6
b6
x
R/W
D5
b5
x
Figure 12-27. IN Byte Count Registers
Endpoint (1-7) IN Byte Count
Chapter 12. EZ-USB Registers
R/W
D4
b4
x
R/W
D3
b3
x
R/W
D2
b2
x
R/W
D1
b1
x
7FB7-7FC3*
EZ-USB TRM v1.9
R/W
D0
b0
x

Related parts for AN2131SC