SL811HS Cypress Semiconductor Corp, SL811HS Datasheet - Page 13

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SL811HS

Manufacturer Part Number
SL811HS
Description
IC USB HOST/SLAVE CTRLR 28PLCC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of SL811HS

Applications
USB Host/Slave Controller
Controller Series
USB-Hosts
Ram Size
256 x 8
Interface
USB
Number Of I /o
8
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 65°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
For Use With
CY3662 - KIT DEVELOPMENT EZ-811HS
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Core Processor
-
Program Memory Type
-
Other names
428-1463

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Document 38-08008 Rev. *D
Endpoint Control Registers
Endpoint n Control Register [Address a = (EP# * 10h), b = (EP# * 10h)+8]. Each endpoint set has a Control register defined
as follows:
Table 22. Endpoint Control Register [Address EP0a/b:00h/08h, EP1a/b:10h/18h, EP2a/b:20h/28h, EP3a/b:30h/38h]
Endpoint Base Address [Address a = (EP# * 10h)+1, b = (EP# * 10h)+9]]. Pointer to memory buffer location for USB reads
and writes.
Table 23. Endpoint Base Address Reg [Address; EP0a/b:01h/09h, EP1a/b:11h/19h, EP2a/b:21h/29h, EP3a/b:31h/39h]
Endpoint Base Length [Address a = (EP# * 10h)+2, b = (EP# * 10h)+A]. The Endpoint Base Length is the maximum packet
size for IN/OUT transfers with the host. Essentially, this designates the largest packet size that is received by the SL811HS with
an OUT transfer, or it designates the size of the data packet sent to the host for IN transfers.
Table 24. Endpoint Base Length Reg [Address EP0a/b:02h/0Ah, EP1a/b:12h/1Ah, EP2a/b:22h/2Ah, EP3a/b:32h/3Ah]
Bit Position
EPxADD7
Reserved
EPxLEN7
7
6
5
4
3
2
1
0
7
7
7
Reserved
Sequence
Send STALL
ISO
Next Data Set
Direction
Enable
Arm
Bit Name
Sequence
EPxADD6
EPxLEN6
6
6
6
Send STALL
EPxADD5
EPxLEN5
Sequence bit. '0' if DATA0, '1' if DATA1.
When set to ‘1’, sends Stall in response to next request on this endpoint.
When set to '1', allows Isochronous mode for this endpoint.
'0' if next data set is ‘A’, '1' if next data set is 'B'.
When Direction = '1', transmit to Host (IN). When Direction = '0', receive from Host (OUT).
When Enable = '1', allows transfers for this endpoint. When set to ‘0’, USB transactions are
ignored. If Enable = '1' and Arm = '0', the endpoint returns NAKs to USB transmissions.
Allows enabled transfers when set =’1’. Clears to '0' when transfer is complete.
Function
5
5
5
EPxADD4
EPxLEN4
ISO
4
4
4
Next Data Set
EPxADD3
EPxLEN3
3
3
3
EPxADD2
EPxLEN2
Direction
2
2
2
EPxADD1
EPxLEN1
Enable
1
1
1
SL811HS
Page 13 of 32
EPxADD0
EPxLEN0
Arm
0
0
0

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