PIC10F222-I/MC Microchip Technology, PIC10F222-I/MC Datasheet - Page 2

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PIC10F222-I/MC

Manufacturer Part Number
PIC10F222-I/MC
Description
IC PIC MCU FLASH 512X12 8DFN
Manufacturer
Microchip Technology
Series
PIC® 10Fr

Specifications of PIC10F222-I/MC

Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
3
Program Memory Type
FLASH
Ram Size
23 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC10
No. Of I/o's
4
Ram Memory Size
23Byte
Cpu Speed
8MHz
No. Of Timers
1
Digital Ic Case Style
DFN
Processor Series
PIC10F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
23 B
Interface Type
USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
4
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 2 Channel
Package
8DFN EP
Device Core
PIC
Family Name
PIC10
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164334 - MODULE SOCKET FOR 8L 2X3MM DFNAC163020-2 - ADAPTER PROGRAM PIC10F 2X3 DFNAC162070 - HEADER INTRFC MPLAB ICD2 8/14P
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC10F222-I/MC
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC10F220/222
2.0
2.1
The user memory space extends from (0x000-0x0FF)
on the PIC10F220 and (0x000-0x1FF) on the
PIC10F222. In Program/Verify mode, the program
memory space extends from (0x000-0x1FF) for the
PIC10F220 and (0x000-0x3FF) for the PIC10F222.
The first half, (0x000-0x0FF) and (0x000-0x1FF),
respectively, is user program memory. The second half,
(0x100-0x1FF) and (0x200-0x3FF), respectively, is
configuration memory. In Program/Verify mode the PC
will increment from (0x000-0x0FF) and (0x000-0x1FF)
respectively, then to 0x100 and 0x200, respectively
(not to 0x000).
In the configuration memory space, 0x100-0x13F for
the PIC10F220 and 0x200-0x23F for the PIC10F222
are physically implemented. However, only locations
0x100-0x103 and 0x200-0x203 are available. Other
locations are reserved.
2.2
A user may store identification (ID) information in four
user ID locations. The user ID locations are mapped in
[0x100:0x103] and [0x200:0x203], respectively. It is
recommended that the user use only the four Least
Significant bits (LSb) of each user ID location and
program the upper 8 bits as ‘1’s. The user ID locations
read out normally, even after code protection is
enabled. It is recommended that user ID location is
written as ‘1111 1111 bbbb’ where ‘bbbb’ is user
ID information.
2.3
The Configuration Word register is physically located at
0x1FF and 0x3FF, respectively. It is only available upon
Program mode entry. Once an Increment Address
command is issued, the Configuration Word is no
longer accessible, regardless of the address of the
program counter.
DS41266C-page 2
Note:
MEMORY MAPPING
User Program Memory Map
User ID Locations
Configuration Word
By convention, the Configuration Word
register is stored at the logical address
location of 0xFFF within the hex file gener-
ated for the PIC10F220/222. This logical
address location may not reflect the actual
physical address for the part itself. It is the
responsibility of the programming software
to retrieve the Configuration Word data
from the logical address within the hex file
and translate the address to the proper
physical location when programming.
FIGURE 2-1:
FIGURE 2-2:
2.4
The oscillator Calibration bits are stored at the Reset
vector as the operand of a MOVLW instruction. Program-
ming interfaces must allow users to program the
Calibration bits themselves for custom trimming of the
INTOSC. Capability for programming the Calibration
bits when programming the entire memory array must
also be maintained for backwards compatibility.
2.5
The backup OSCCAL value, 0x104/0x204, is a factory
reserved location where the OSCCAL value is stored
during testing of the INTOSC. This location is not
erased during a standard Bulk Erase, but is erased if
the PC is moved into configuration memory prior to
invoking a Bulk Erase. If this value is erased, it is the
user’s responsibility to rewrite it back to this location for
future use.
Oscillator Calibration Bits
Backup OSCCAL Value
Backup OSCCAL value
Backup OSCCAL value
User ID Locations
Configuration Word
Configuration Word
User ID Locations
Reset Vector
Unimplemented
PIC10F220 PROGRAM
MEMORY MAP
PIC10F222 PROGRAM
MEMORY MAP
Unimplemented
Reset Vector
Program
On-chip
Memory
Reserved
© 2007 Microchip Technology Inc.
Reserved
Program
On-chip
User
Memory
User
000h
0FFh
100h
1FEh
1FFh
200h
203h
204h
205h
23Fh
240h
3FEh
3FFh
010h
00Fh
000h
0FEh
0FFh
100h-
103h
104h
105h
13Fh
140h
1FEh
1FFh

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