XS1-L02A-QF124-C5 XMOS, XS1-L02A-QF124-C5 Datasheet - Page 2

• Manufacturer Part Number: XS1-L02A-QF124-C5
• Description: IC MPU 32BIT DUAL CORE 124QFN
• Manufacturer: XMOS

Specifications of XS1-L02A-QF124-C5

• Processor Type: XCore 32-Bit
• Speed: 500MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 124-TFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 880-1020

XS1-L2 124QFN Datasheet (1.5)
1 Description
XS1-L2 Package Features
XCore Resources (per core)
The XS1-L2 is a member of the XS1-L family of
XMOS devices. The XS1-L family blends a power-
ful programmable fabric based on multi-threaded
processors with a high-level programming language
design flow. XMOS chips are general-purpose pro-
grammable devices that can be used in a wide range
of applications and systems.
The XS1-L2 device is based on the XMOS XCore™.
Each XCore contains a 32-bit processor, SRAM mem-
ory, I/O ports for communicating with external com-
ponents and channels for communicating with other
devices.
OTP memory is provided for application boot code
and security keys, with a secure mode that disables
debug and prevents read-back of memory contents.
High performance switches supports low latency
and deterministic communication between the
threads in different XCores.
The XMOS architecture is unique in its direct support
for concurrent processing (multi-threading), event
handling, communication and timed I/O operations.
Two XCores providing up to 1000MIPS and 16 concurrent, deterministic real-time tasks
84 user I/O pins, dynamically configurable as input, output or bi-directional
Threads
Channel Ends
Timers
Clock Blocks
XMOS Links
Thread Synchronisers
Hardware Locks
SRAM
OTP Memory
8
32
10
6 (includes the reference clock)
2 (5bit or 2bit)
7
4
64KBytes
8KBytes
www.xmos.com
JTAG
I/O
XS1-L2
XCore0
1 x 32bit
2 x 16bit
16 x 1bit
8KBytes
4 x 8bit
6 x 4bit
Ports
JTAG
OTP
I/O
TAP
JTAG
PLL
7 Synchronisers
8 Threads per XCore
10 Timers
Switch
Constant Pointer
Stack Pointer
Link Register
Processor
Data Pointer
Per Thread
Reg 10
Reg 11
Reg 0
Reg 1
Reg 2
Reg 3
Reg 4
Reg 5
Reg 6
Reg 7
Reg 8
Reg 9
XCore
64KBytes SRAM
XMOS Link
Switch
XMOS Link
6 Clock Blocks
4 Locks
PLL
XCore1
JTAG
Channel
Ends
(32)
2/28
I/O