MPC8360VVAGDGA Freescale Semiconductor, MPC8360VVAGDGA Datasheet - Page 20
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MPC8360VVAGDGA
Manufacturer Part Number
MPC8360VVAGDGA
Description
IC MPU POWERQUICC II PRO 740TBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8360CZUAJDG.pdf
(108 pages)
Specifications of MPC8360VVAGDGA
Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
740-TBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8360E-RDK
Maximum Clock Frequency
400 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
For Use With
MPC8360EA-MDS-PB - KIT APPLICATION DEV 8360 SYSTEMMPC8360E-RDK - BOARD REFERENCE DESIGN FOR MPC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8360VVAGDGA
Manufacturer:
AVX
Quantity:
3 000
Company:
Part Number:
MPC8360VVAGDGA
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MPC8360VVAGDGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
DDR and DDR2 SDRAM
6
This section describes the DC and AC electrical specifications for the DDR and DDR2 SDRAM interface
of the MPC8360E/58E.
6.1
Table 14
device when GV
20
UART/async HDLC
BISYNC
USB
Notes:
1. The QUICC Engine module needs to run at a frequency higher than or equal to what is listed in this table.
2. ‘F’ is the actual interface operating frequency.
3. The bit rate limit is independent of the data bus width (that is, the same for serial, nibble, or octal interfaces).
4. TDM in high-speed mode for serial data interface.
I/O supply voltage
I/O reference voltage
I/O termination voltage
Input high voltage
Input low voltage
Output leakage current
Output high current (V
Output low current (V
MV
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
REF
input leakage current
DDR and DDR2 SDRAM
provides the recommended operating conditions for the DDR2 SDRAM component(s) of the
DDR and DDR2 SDRAM DC Electrical Characteristics
Parameter/Condition
Table 13. QUICC Engine Block Operating Frequency Limitations (continued)
Table 14. DDR2 SDRAM DC Electrical Characteristics for GV
Interface
DD
OUT
OUT
(typ) = 1.8 V
= 0.280 V)
= 1.420 V)
.
3.68 (max internal ref
Symbol
Interface Operating
MV
GV
Frequency (MHz)
I
VREF
V
V
I
I
I
V
OZ
OH
OL
TT
REF
IH
48 (ref clock)
IL
DD
2 (max)
clock)
MV
MV
0.49 × GV
REF
REF
–13.4
1.71
–0.3
13.4
Min
—
—
+ 0.125
– 0.04
Max Interface Bit
DD
Rate (Mbps)
115 (Kbps)
12
2
MV
MV
0.51 × GV
GV
REF
REF
DD
Max
1.89
DD
±10
±10
—
—
– 0.125
+ 0.04
+ 0.3
(typ) = 1.8 V
Min QUICC Engine
Frequency
DD
Operating
Freescale Semiconductor
20
20
96
1
(MHz)
Unit
mA
mA
μA
μA
V
V
V
V
V
Notes
Notes
—
—
—
—
—
—
—
—
1
2
3
4