GCIXP1200GC Intel, GCIXP1200GC Datasheet - Page 5

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GCIXP1200GC

Manufacturer Part Number
GCIXP1200GC
Description
IC MPU NETWORK 232MHZ 432-BGA
Manufacturer
Intel
Datasheets

Specifications of GCIXP1200GC

Rohs Status
RoHS non-compliant
Processor Type
Network
Features
32-bit StrongARM RISC Core
Speed
232MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
432-BGA
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Other names
839429
Datasheet
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Reset Logic .........................................................................................................23
Pinout Diagram....................................................................................................25
64-Bit Bidirectional IX Bus, 1-2 MAC Mode.........................................................52
64-Bit Bidirectional IX Bus, 1-2 MAC Mode, FastPort Device .............................53
64-Bit Bidirectional IX Bus, 3+ MAC Mode..........................................................55
32-Bit Unidirectional IX Bus, 1-2 MAC Mode ......................................................58
32-bit Unidirectional IX Bus, 3+ MAC Mode (3-4 MACs Supported) ...................60
Typical IXP1200 Heatsink Application.................................................................69
PXTAL Clock Input ..............................................................................................72
PCI Clock Signal AC Parameter Measurements.................................................73
PCI Bus Signals ..................................................................................................74
RESET_IN# Timing Diagram ..............................................................................76
IEEE 1149.1/Boundary-Scan General Timing.....................................................78
IEEE 1149.1/Boundary-Scan Tri-State Timing....................................................79
FCLK Signal AC Parameter Measurements........................................................80
IX Bus Signals Timing .........................................................................................81
64-Bit Bidirectional IX Bus Timing, 1-2 MAC Mode, Consecutive Receive and
Transmit, No EOP ...............................................................................................83
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit,
No EOP ...............................................................................................................84
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit,
EOP on 8th Data Return with Status...................................................................85
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit,
EOP on 7th Data Return with Status...................................................................86
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit,
EOP on 6th Data Return with Status...................................................................87
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit,
EOP on 5th Data Return with Status...................................................................88
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit,
EOP on 4th Data Return with Status...................................................................89
64-Bit Bidirectional IX Bus Timing - Consecutive Receive and Transmit,
EOP on 1st through 3rd Data Return with Status (3rd Data Return Shown).......90
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 1st Data
Return, No Status................................................................................................91
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, No EOP .................92
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 8th
Data Return with Status ......................................................................................93
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 7th
Data Return with Status ......................................................................................94
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP on 6th Data
Return with Status ...............................................................................................95
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, EOP, Two
Element Transfer with Status ..............................................................................96
64-Bit Bidirectional IX Bus Timing - Consecutive Receives, Fetch-9, No EOP...97
64-Bit Bidirectional IX Bus Timing - Consecutive Transmits, EOP......................98
64-Bit Bidirectional IX Bus Timing - Consecutive Transmits with Prepend, EOP 99
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, No EOP.............100
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, EOP on 16th
Data Return with Status ....................................................................................101
32-Bit Unidirectional IX Bus Timing - Consecutive Receives, EOP on
15th Data Return with Status ............................................................................102
Intel
®
IXP1200 Network Processor
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