Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 47

• Manufacturer Part Number: Z8038018FSG
• Description: IC 16 BIT Z80 MPU 100-QFP
• Manufacturer: Zilog

Specifications of Z8038018FSG

• Processor Type: Z380
• Features: 16-Bit, High-Performance Enhanced Z80 CPU
• Speed: 18MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Processor Series: Z80380x
• Core: Z380
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 18 MHz
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PS010002-0708
Each register set includes the primary registers A, F, B, C, D, E, H, L, IX, and IY, as well
as the alternate registers A’, F’, B’, C’, D’, E’, H’, L’, IX’, and IY’. These byte registers
can be paired B with C, D with E, H with L, B’ with C’, D’ with E’ and H’ with L’ to form
word registers. These word registers are extended to 32 bits with the z extension to the
register. This register extension is only accessible when using the register as a 32-bit regis-
ter (the Long Word mode) or when swapping between the most-significant and least-sig-
nificant word of a 32-bit register. Whenever an instruction refers to a word register, the
implicit size is controlled by the Word or Long Word mode. Also included are the R, I and
SP registers, as well as the PC.
CPU Control Register Space
The CPU control register space consists of the 32-bit Select Register (SR), Figure 34. The
SR may be accessed as a whole or the upper three bytes of the SR may be accessed indi-
vidually as the YSR, XSR, and DSR. In addition, these upper three bytes can be loaded
with the same byte value. The SR may also be PUSHed and POPed and is cleared to all
zeros on Reset.
IYBANK
IY' registers. This field can be set independently of the register set selection for the other
Z380 CPU registers. Reset selects Bank 0 for IY and IY'.
IYP (IYPrime Register Select).
rently active register. IY is selected when this bit is cleared and IY' is selected when this
bit is set. Reset clears this bit and selects IY.
IXBANK (IX Bank Select).
IX' registers. This field can be set independently of the register set selection for the other
Z380 CPU registers. Reset selects Bank 0 for IX and IX'.
31
15
30
14
Reserved (0)
Reserved (0)
(IY Bank Select). This 2-bit field selects the register set to be used for the IY and
29
13
28
12
YSR
DSR
27
11
Figure 34. Select Register
MAINBANK
This 2-bit field selects the register set to be used for the IX and
26
10
IYBANK
This bit controls and reports whether IY or IY' is the cur-
25
9
ALT
IYP
24
8
XM
23
7
LW
22
6
Reserved (0)
IEF1
21
5
20
4
Z380 Microprocessor
XSR
IM
Product Specification
19
3
18
2
0
IXBANK
LCK
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17
1
16
IXP
AFP
0