MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 17

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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MOTOROLA
Number
Figure
Word Write Access Terminated with TEA Timing ........................................ 7-39
Line Read Access Terminated with TEA Timing .......................................... 7-40
Retry Read Transfer Timing ......................................................................... 7-41
Retry Operation on Line Write ...................................................................... 7-42
M68040 Internal Interpretation State Diagram and
Lock Violation Example ................................................................................ 7-49
Processor Bus Request Timing.................................................................... 7-50
Arbitration During Relinquish and Retry Timing ........................................... 7-51
Implicit Bus Ownership Arbitration Timing.................................................... 7-52
Dual M68040 Fairness Arbitration State Diagram ........................................ 7-53
Dual M68040 Prioritized Arbitration State Diagram ..................................... 7-55
M68040 Synchronous DMA Arbitration ........................................................ 7-56
Sample Synchronizer Circuit ........................................................................ 7-57
M68040 Asynchronous DMA Arbitration ...................................................... 7-58
Snoop-Inhibited Bus Cycle ........................................................................... 7-61
Snoop Access with Memory Response........................................................ 7-62
Snooped Line Read, Memory Inhibited ........................................................ 7-64
Snooped Long-Word Write, Memory Inhibited ............................................. 7-65
Initial Power-On Reset Timing...................................................................... 7-66
Normal Reset Timing ................................................................................... 7-67
Multiplexed Address and Data Bus (Line Write)........................................... 7-69
DLE Mode Block Diagram ............................................................................ 7-70
DLE versus Normal Data Read Timing ........................................................ 7-71
General Exception Processing Flowchart .................................................... 8-3
General Form of Exception Stack Frame ..................................................... 8-4
Interrupt Recognition Examples ................................................................... 8-14
Interrupt Exception Processing Flowchart .................................................... 8-16
Reset Exception Processing Flowchart........................................................ 8-18
Flowchart of RTE Instruction for Throwaway Four-Word Frame .................. 8-22
Special Status Word Format ........................................................................ 8-24
Write-Back Status Format ............................................................................ 8-26
Floating-Point User Programming Model ..................................................... 9-2
Floating-Point Control Register .................................................................... 9-4
FPSR Condition Code Byte.......................................................................... 9-4
FPSR Quotient Byte ..................................................................................... 9-5
FPSR Exception Status Byte ....................................................................... 9-5
FPSR Accrued Exception Byte .................................................................... 9-6
Intermediate Result Format.......................................................................... 9-12
Rounding Algorithm Flowchart ..................................................................... 9-14
External Bus Arbiter Circuit ........................................................................ 7-47
LIST OF ILLUSTRATIONS (Continued)
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M68040 USER’S MANUAL
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