MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 63

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Descriptor Address
G—Global
M—Modified
PDT—Page Descriptor Type
Physical Address
S—Supervisor Protected
3-14
This 30-bit field, which contains the physical address of a page descriptor, is only used
in indirect descriptors.
When this bit is set, it indicates the entry is global. PFLUSH instruction variants that
specify nonglobal entries do not invalidate global entries, even when all other selection
criteria are satisfied. If these PFLUSH variants are not used, then system software can
use this bit.
This bit identifies a modified page. The M68040 sets the M-bit in the corresponding
page descriptor before a write operation to a page for which the M-bit is clear, except for
write-protect or supervisor violations. The read portion of a read-modify-write access is
considered a write for updating purposes. The M68040 never clears this bit.
This field identifies the descriptor as an invalid descriptor, a page descriptor for a
resident page, or an indirect pointer to another page descriptor.
01 or 11 = Resident
This 20-bit field contains the physical base address of a page in memory. The logical
address supplies the low-order bits of the address required to index into the page.
When the page size is 8-Kbyte, the least significant bit of this field is not used.
This bit identifies a page as supervisor only. Only programs operating in the supervisor
mode are allowed to access the portion of the logical address space mapped by this
descriptor when the S-bit is set. If the bit is clear, both supervisor and user accesses are
allowed.
00 = Invalid
10 = Indirect
This code indicates that the descriptor is invalid. An invalid descriptor can
represent a nonresident page or a logical address range that is out of
bounds. All other bits in the descriptor are ignored. When an invalid
descriptor is encountered, an ATC entry is created for the logical address
with the resident bit in the MMUSR clear.
These codes indicate that the page is resident.
This code indicates that the descriptor is an indirect descriptor. Bits 31–2
contain the physical address of the page descriptor. This encoding is invalid
for a page descriptor pointed to by an indirect descriptor.
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER'S MANUAL
Go to: www.freescale.com
MOTOROLA