MPC8347EVVAJFB Freescale Semiconductor, MPC8347EVVAJFB Datasheet - Page 26

IC MPU POWERQUICC II 672-TBGA

MPC8347EVVAJFB

Manufacturer Part Number
MPC8347EVVAJFB
Description
IC MPU POWERQUICC II 672-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8347EVVAJFB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
533MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
672-TBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8349E-MITXE
Maximum Clock Frequency
533 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
533MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
TBGA
No. Of Pins
672
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Ethernet: Three-Speed Ethernet, MII Management
Figure 10
8.2.2.2
Table 24
Figure 11
26
At recommended operating conditions with LV
RX_CLK clock period 10 Mbps
RX_CLK clock period 100 Mbps
RX_CLK duty cycle
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise V
RX_CLK clock fall time V
Note:
1. The symbols for timing specifications follow the pattern of t
and t
(MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
the high (H) state or setup time. Also, t
(D) went invalid (X) relative to the t
reference symbol is based on three letters representing the clock of a particular functionl. For example, the subscript of t
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used with the appropriate letter:
R (rise) or F (fall).
(first two letters of functional block)(reference)(state)(signal)(state)
provides the MII receive AC timing specifications.
provides the AC test load for TSEC.
shows the MII transmit AC timing diagram.
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
MII Receive AC Timing Specifications
TXD[3:0]
TX_CLK
Parameter/Condition
TX_EN
TX_ER
IL
(min) to V
IH
(max) to V
Output
IH
(max)
Table 24. MII Receive AC Timing Specifications
MRX
Figure 10. MII Transmit AC Timing Diagram
IL
t
(min)
MTXH
DD
MRDXKL
clock reference (K) going to the low (L) state or hold time. In general, the clock
/OV
Figure 11. TSEC AC Test Load
t
DD
MTX
symbolizes MII receive timing (GR) with respect to the time data input signals
of 3.3 V ± 10%.
Z
0
= 50 Ω
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
t
t
MTKHDX
MRXH
t
Symbol
t
t
MTXF
MRDVKH
MRDXKH
t
t
t
t
MRXR
MRXF
MRX
MRX
/t
MRX
1
R
L
t
MTXR
= 50 Ω
10.0
10.0
Min
1.0
1.0
35
MRDVKH
OV
MRX
DD
Typ
400
40
symbolizes MII receive timing
/2
clock reference (K) going to
Freescale Semiconductor
Max
4.0
4.0
65
for inputs
Unit
ns
ns
ns
ns
ns
ns
%
MRX

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