668-0010 Rabbit Semiconductor, 668-0010 Datasheet - Page 91
![no-image](/images/no-image-200.jpg)
668-0010
Manufacturer Part Number
668-0010
Description
IC MPU RABIT3000 55.5MHZ 128LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0011.pdf
(312 pages)
Specifications of 668-0010
Rohs Status
RoHS non-compliant
Processor Type
Rabbit 3000 8-Bit
Speed
55.5MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Features
-
Other names
316-1016
- Current page: 91 of 312
- Download datasheet (2Mb)
11.2 Dependencies
11.2.1 I/O Pins
Parallel Port D uses pins PD0 through PD7. These pins can be used individually as data
inputs or outputs, as serial port transmit and receive for Serial Ports A and B, or as PWM
outputs. The input capture peripheral can also watch pins PD7, PD5, PD3, and PD1..
All pins are set as inputs on startup.
The individual bits can be set to be open-drain outputs or standard outputs via PDDCR.
11.2.2 Clocks
All outputs on Parallel Port D are clocked by the peripheral clock divided by 2 unless
changed in PDCR, where the option of updating the Parallel Port D pins can be synchro-
nized to the output of Timer A1, Timer B1, or Timer B2.
11.2.3 Other Registers
11.2.4 Interrupts
There are no interrupts associated with Parallel Port D.
11.3 Operation
The following steps must be taken before using Parallel Port D.
1. Select the desired input/output direction for each pin via PDDDR.
2. Select standard high/low or open-drain functionality for outputs via PDDCR.
3. If you plan to use a pin pair as a serial port, select it via PDFR (transmit/output) and set
Once Parallel Port D is set up, data can be read or written by accessing PDDR. The value
of an output pin read in from PDDR will reflect its current output value, but any value
written to an input pin will not appear until that pin becomes an output.
On reset, PDDDR is zeroed, making all pins inputs. In addition bits 0, 1, 4, and 5 in PDCR
are zeroed to ensure that data are clocked into the output registers when loaded. All other
registers associated with Parallel Port D are not initialized on reset.
Chapter 11 Parallel Port D
up the serial inputs (receive) as asynchronous or clocked via bits 4, 5, and 6 of the
corresponding Serial Port Control Registers (SxCR).
SACR, SBCR
Register
Select a Parallel Port D pin as serial data input.
Function
81
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