R80C188XL25 Intel, R80C188XL25 Datasheet - Page 24
![no-image](/images/manufacturer_photos/0/3/336/intel_sml.jpg)
R80C188XL25
Manufacturer Part Number
R80C188XL25
Description
IC MPU 16-BIT 5V 25MHZ 68-LCC
Manufacturer
Intel
Datasheet
1.S80C188XL25.pdf
(48 pages)
Specifications of R80C188XL25
Rohs Status
RoHS non-compliant
Processor Type
80C188
Features
XL suffix, 16-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
68-LCC
Other names
803902
80C186XL 80C188XL
AC SPECIFICATIONS
MAJOR CYCLE TIMINGS (READ CYCLE)
T
All timings are measured at 1 5V and 50 pF loading on CLKOUT unless otherwise noted
All output test conditions are with C
For AC tests input V
24
Symbol
80C186XL GENERAL TIMING REQUIREMENTS (Listed More Than Once)
T
T
80C186XL GENERAL TIMING RESPONSES (Listed More Than Once)
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
A
DVCL
CLDX
CHSV
CLSH
CLAV
CLAX
CLDV
CHDX
CHLH
LHLL
CHLL
AVLL
LLAX
AVCH
CLAZ
CLCSV
CXCSX
CHCSX
DXDL
CVCTV
CVDEX
CHCTV
CLLV
e
0 C to
Data in Setup (A D)
Data in Hold (A D)
Status Active Delay
Status Inactive Delay
Address Valid Delay
Address Hold
Data Valid Delay
Status Hold Time
ALE Active Delay
ALE Width
ALE Inactive Delay
Address Valid to ALE Low
Address Hold from ALE
Inactive
Address Valid to Clock High
Address Float Delay
Chip-Select Active Delay
Chip-Select Hold from
Command Inactive
Chip-Select Inactive Delay
DEN Inactive to DT R Low
Control Active Delay 1
DEN Inactive Delay
Control Active Delay 2
LOCK Valid Invalid Delay
a
70 C V
Parameter
IL
CC
e
0 45V and V
e
5V
g
10%
L
T
T
T
e
T
CLCH
CLCH
IH
CLCL
80C186XL25
CHCL
T
50 pF
e
Min
CLAX
10
8
3
3
3
3
0
3
0
3
3
0
3
3
3
3
b
b
b
2 4V except at X1 where V
b
15
10
10
8
Max
20
20
20
20
20
20
20
20
17
17
17
20
17
T
T
T
T
CLCH
CHCL
CLCH
CLCL
80C186XL20
T
Min
CLAX
10
10
Values
3
3
3
3
0
3
0
3
3
0
3
3
3
3
b
b
b
b
15
10
10
10
Max
25
25
27
27
20
20
20
25
20
22
22
22
22
IH
T
T
T
T
e
CLCH
CHCL
CLCH
CLCL
80C186XL12
T
V
Min
CLAX
15
10
CC
3
3
3
3
0
3
0
3
3
0
3
3
3
3
b
b
b
b
b
15
15
15
10
0 5V
Max
35
35
36
36
25
25
25
33
30
37
37
37
37
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
Loading
Loading
Loading
Loading
Equal
Equal
Equal
Equal
Test