LUPXA255A0C200 Intel, LUPXA255A0C200 Datasheet - Page 25

• Manufacturer Part Number: LUPXA255A0C200
• Description: IC MICRO PROCESSOR 200MHZ 256BGA
• Manufacturer: Intel

Specifications of LUPXA255A0C200

• Processor Type: XScale®
• Speed: 200MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 866868

D4.
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D6.
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Intel® PXA255 Processor Specification Update
Alternate interface settings not supported in USB.
Intel® PXA255 Processor Developer’s Manual
12.1 USB Overview, first paragraph line states:
Configurations 1, 2, and 3 each support two interfaces. This allows the host to accommodate
dynamic changes in the physical bus topology.
It should state:
Configurations 1, 2, and 3 each support two interfaces. Alternate interface settings are not
supported. This allows the host to accommodate dynamic changes in the physical bus topology.
Alternate interface settings not supported in USB.
Intel® PXA255 Processor Developer’s Manual
12.3.6 UDC Device Requests, third paragraph states:
The UDC decodes most standard device commands with no intervention required by the user. The
following commands are not passed to the user are: Set Address, Set Feature, Clear Feature, Get
Configuration, Get Status, Get Interface, and Sync Frame. The Set Configuration and Set Interface
commands are passed to the user to indicate that the host set the specified configuration or interface
and the software must take any necessary actions. The Get Descriptor and Set Descriptor
commands are passed to the user to be decoded.
It should state:
The UDC decodes most standard device commands with no intervention required by the user. The
following commands are not passed to the user are: Set Address, Set Feature, Clear Feature, Get
Configuration, Get Status, Get Interface, and Sync Frame. The Set Configuration and Set Interface
commands are passed to the user to indicate that the host set the specified configuration or interface
and the software must take any necessary actions. Alternate interfaces settings are not supported;
the host must set the alternate settings field in SET_INTERFACE requests to zero. If the UDC
receives a SET_INTERFACE request with the alternate settings field non-zero, the UDC responds
with a STALL. The Get Descriptor and Set Descriptor commands are passed to the user to be
decoded.
GPIO Reset Procedure
Intel® PXA255 Processor Developer’s Manual
6.12 GPIO Reset Procedure currently states:
On a GPIO reset, the Memory Controller registers keep the values they had before the reset. No
new configuration programming is required. The memory’s contents are not guaranteed and
software must determine if the memory’s contents have been compromised.
It should state:
On a GPIO Reset, the Memory Controller registers keep the values they had before the reset. No
new configuration programming is required. However, SDRAM refreshes do not occur during the
reset time. After nRESET_OUT is deasserted, the memory controller will continue refreshing. By
ensuring a refresh time for SDRAM that is smaller than the default, it is possible to preserve the
SDRAM contents. To do this, follow this procedure:
1. The SDRAM refresh time is chosen by taking the specified refresh time, typically 64 ms, and
subtracting the GPIO reset time (found in the Intel® PXA26x Processor Family Electrical,
Documentation Changes
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