WAU8822YG Nuvoton Technology Corporation of America, WAU8822YG Datasheet - Page 13

IC STER AUDIO CODEC 24BIT 32-QFN

WAU8822YG

Manufacturer Part Number
WAU8822YG
Description
IC STER AUDIO CODEC 24BIT 32-QFN
Manufacturer
Nuvoton Technology Corporation of America
Series
emPowerAudio™r
Type
Stereo Audior
Datasheets

Specifications of WAU8822YG

Data Interface
I²C, Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
90 / 94
Voltage - Supply, Analog
2.5 V ~ 3.6 V
Voltage - Supply, Digital
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-QFN
For Use With
WAU8822EVB - BOARD EVALUATION FOR WAU8822
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WAU8822YG
Manufacturer:
Maxim
Quantity:
233
Part Number:
WAU8822YG
Manufacturer:
NUVOTON
Quantity:
20 000
Company:
Part Number:
WAU8822YG
Quantity:
800
2.3
WAU8822 can be programmed to enable/disable various analog blocks individually, and the current to some of the
major blocks can be reduced with minimum impact on performance. The table below shows the change in current
consumed with different register settings. Sample rate settings will vary current consumption of VDDC supply,
which draws consumes approximately 4mA @ 1.8V and fs = 48kHz. Lower sampling rates draw lower current.
WAU8822 Data Sheet Rev 0.86
emPowerAudio
Supply Currents of Specific Blocks
Dec
58
Register
1
2
3
Hex
3A
01
02
03
Management
Management
Management
Management
Function
Power
Power
Power
Power
Table 2: VDDA 3.3V Supply Current in Various Modes
1
2
3
4
AUXOUT2EN[7]
AUXOUT1EN[8]
AUX2MXEN[6]
AUX1MXEN[7]
MICBIASEN[4]
REGVOLT[2:3]
MICBIASM[4]
DCBUFEN[8]
REFIMP[1:0]
IOBUFEN[2]
ABIASEN[3]
BIASGEN[4]
LADCEN[0]
RADCEN[1]
RPGAEN[3]
LDACEN[0]
RDACEN[1]
LPGAEN[2]
LMIXEN[2]
RMIXEN[3]
IBIADJ[1:0]
LPIPBST[7]
LBSTEN[4]
RBSTEN[5]
RSPKEN[5]
LSPKEN[6]
LPSPKD[5]
LHPEN[7]
RHPEN[8]
LPADC[6]
LPDAC[8]
PLLEN[5]
SLEEP[6]
Bit
Page 13 of 21
+100μA for 80kΩ and 300kΩ
+260μA for 3kΩ
+100μA
+600μA
+540μA
+2.5 mA +1/5mA from VDDC with
clocks applied
+200μA
+200μA
+140μA
+2.3 mA with 64X OSR
+3.3 mA with 128X OSR
+2.3 mA with 64X OSR
+3.3 mA with 128X OSR
+300μA
+300μA
+650μA
+650μA
+800μA
+800μA
+1.6 mA with 64X OSR
+1.7 mA with 128X OSR
+1.6 mA with 64X OSR
+1.7 mA with 128X OSR
+250μA
+250μA
+1.1 mA from VDDSPK
+1.1 mA from VDDSPK
+225μA
+225μA
-1.2mA with IBIADJ at 11
-1.1mA with no SNR decrease @ 8kHz
-600μA with no SNR decrease @ 8kHz
-1.1mA with 1.4dB SNR decrease
@ 44.1kHz
VDDA current increase/
Decrease when enabled
September 4, 2008

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