WAU8822YG Nuvoton Technology Corporation of America, WAU8822YG Datasheet - Page 19

• Manufacturer Part Number: WAU8822YG
• Description: IC STER AUDIO CODEC 24BIT 32-QFN
• Manufacturer: Nuvoton Technology Corporation of America
• Series: emPowerAudio™r
• Type: Stereo Audior

Specifications of WAU8822YG

• Data Interface: I²C, Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 94
• Voltage - Supply, Analog: 2.5 V ~ 3.6 V
• Voltage - Supply, Digital: 1.65 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• For Use With: WAU8822EVB - BOARD EVALUATION FOR WAU8822
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4
WAU8822 Data Sheet Rev 0.86
emPowerAudio
General Audio Controls
Equalizer
DAC Limiter
Notch Filter
ALC and Noise Gate Control
Phase Locked Loop
Miscellaneous
PCM Time Slot and ADCOUT Impedance Option Control
Silicon Revision and Device ID
DEC HEX NAME
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
8
9
0A
0D
1A
1D
2A
2D
3A
3D
00
01
02
03
04
05
06
07
08
09
0B
0C
0E
10
11
12
13
14
15
16
17
18
19
1B
1C
1E
1F
20
21
22
23
24
25
26
27
28
29
2B
2C
2E
2F
30
31
32
33
34
35
36
37
38
39
3B
3C
3E
3F
F
Appendix D: Register Overview
Software Reset
Power Management 1
Power Management 2
Power Management 3 AUXOUT1EN AUXOUT2EN
Audio Interface
Companding
Clock Control 1
Clock Control 2
GPIO
Jack Detect 1
DAC Control
Left DAC Volume
Right DAC Volume
Jack Detect 2
ADC Control
Left ADC Volume
Right ADC Volume
Reserved
EQ1-low cutoff
EQ2-peak 1
EQ3-peak 2
EQ4-peak3
EQ5-high cutoff
Reserved
DAC Limiter 1
DAC Limiter 2
Reserved
Notch Filter 1
Notch Filter 2
Notch Filter 3
Notch Filter 4
Reserved
ALC Control 1
ALC Control 2
ALC Control 3
Noise Gate
PLL N
PLL K 1
PLL K 2
PLL K 3
Mic Bias Mode
3D control
Reserved
Right Speaker Submix
Input Control
Left Input PGA Gain
Right Input PGA Gain
Left ADC Boost
Right ADC Boost
Output Control
Left Mixer
Right Mixer
LHP Volume
RHP Volume
LSPKOUT Volume
RSPKOUT Volume
AUX2 Mixer
AUX1 Mixer
Power Management 4
Left Time Slot
Misc
Right Time Slot
Device Revision #
Device ID
™
DACLIMEN
DCBUFEN
LPGABST
RPGABST
PCMTSEN
4WSPIEN
LDACVU
RDACVU
LADCVU
RADCVU
LSPKVU
RSPKVU
Reserved
Reserved
Reserved
RHPEN
EQ2BW
EQ3BW
EQ4BW
LPGAU
RPGAU
LHPVU
RHPVU
LPDAC
BCLKP
HPFEN
NFCU1
NFCU2
NFCU3
NFCU4
CLKM
ALCM
EQM
Bit 8
JCKMIDEN
MICBIASV
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
ALCEN
LAUXMXGAIN
RAUXMXGAIN
AUX1MXEN
RPGAZC
LPGAZC
RSPKZC
LPIPBST
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
LSPKZC
HPFAM
NHPEN
NFCEN
LHPZC
RHPZC
Bit 7
LRP
TRI
Reserved
Reserved
AUXOUT2MT
AUXOUT1MT AUX1HALF
AUX2MXEN
RSPKMUTE
LSPKMUTE
RLINRPGA
LDACRMX
MCLKSEL
LHPMUTE
RHPMUTE
RPGAMT
PCM8BIT
SOFTMT
Reserved
LPGAMT
LSPKEN
JCKDEN
Reserved
LPADC
SLEEP
Bit 6
Page 19 of 21
DACLIMDCY
JCKDOEN1
ALCDCY
Reserved
ALCHT
EQ1CF
EQ2CF
EQ3CF
EQ4CF
EQ5CF
WLEN
LPGABSTGAIN
RPGABSTGAIN
DACLIMTHL
RMICNRPGA RMICPRPGA
RMIXMUT
RAUXRMX
RDACLMX
LAUXLMX
RBSTEN
RSPKEN
LPSPKD
PUDEN
PLLEN
CMB8
HPF
Bit5
Reserved
GPIO1PLL
Reserved
Reserved
JCKDIO
RESET (SOFTWARE)
ALCMXGAIN
ALCTBLSEL
LTSLOT[8:0]
RTSLOT[8:0]
MICBIASEN
LMIXAUX1 LDACAUX1 RADCAUX1 RMIXAUX1
PLLK[17:9]
MICBIASM
PLLMCLK
RSUBBYP
AUX1BST
BIASGEN
PLLK[8:0]
LBSTEN
PUDPE
Bit 4
ID
RDACGAIN
RADCGAIN
LDACGAIN
LADCGAIN
DACCM
AIFMT
REV
LBYPMXGAIN
RBYPMXGAIN
AUX1MIX>2 LADCAUX2 LMIXAUX2
NFCA0[13:7]
NFCA1[13:7]
SPKSTAGE
BCLKSEL
NFCA0[6:0]
NFCA1[6:0]
AUX2BST
ABIASEN
RPGAEN
RMIXEN
GPIO1PL
ALCNEN
Reserved
Reserved
DACOS
ADCOS
PUDPS
Bit 3
REGVOLT
PLLK[23:18]
LPGAGAIN
RPGAGAIN
RSPKGAIN
LSPKGAIN
RHPGAIN
LHPGAIN
RAUXRSUBG
LLINLPGA LMICNLPGA
IOBUFEN
AUTOMT
LPGAEN
LMIXEN
DACPHS
Reserved
SPKBST
Reserved
SMPLR
Bit 2
EQ1GC
EQ2GC
EQ3GC
EQ4GC
EQ5GC
DACLIMATK
DACLIMBST
ADCCM
JCKDOEN0
3DDEPTH
ALCATK
Reserved
ALCSL
PLLN
LAUXBSTGAIN
RAUXBSTGAIN
RBYPRMX
RTSLOT[9]
LBYPLMX
ALCMNGAIN
September 4, 2008
RADCEN
RDACEN
ADCPHS
RDACPL
RADCPL
Reserved
GPIO1SEL
TSEN
ALCNTH
Bit 1
REFIMP
IBADJ
RAUXSMUT
LMICPLPGA
RDACAUX1
LDACAUX2
PASSTHRU
RDACRMX
MICBIASM
LDACLMX
LTSLOT[9]
AOUTIMP
CLKIOEN
LADCEN
LDACEN
SCLKEN
LDACPL
LADCPL
MONO
Bit 0
Default
000
000
000
050
000
140
000
000
000
000
0FF
0FF
000
100
0FF
0FF
12C
02C
02C
02C
02C
032
000
000
000
000
000
038
00B
032
010
008
00C
093
0E9
000
000
000
033
010
010
100
100
002
001
001
039
039
039
039
001
001
000
000
020
000
xxx
xxx