EMC6D103-CZC SMSC, EMC6D103-CZC Datasheet - Page 54

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EMC6D103-CZC

Manufacturer Part Number
EMC6D103-CZC
Description
Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
Manufacturer
SMSC
Datasheet

Specifications of EMC6D103-CZC

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EMC6D103-CZC
Manufacturer:
SMSC
Quantity:
20 000
Revision 0.3 (03-01-07)
8.1
8.2
8.2.1
8.2.2
Register
Address
Register
Address
1Dh
1Eh
1Fh
10h
Undefined Registers
Defined Registers
Read/
Read/
Write
Write
R/W
R/W
R/W
R/W
Note: SMSC Test Registers may be read/write registers. Writing these registers can cause unwanted
Note 8.1
Note 8.2
Note 8.3
Note 8.4
Note 8.5
Note 8.6
Note 8.7
The registers shown in the table above are the defined registers in the part. Any reads to undefined
registers always return 00h. Writes to undefined registers have no effect and do not return an error.
Register
Setting the Lock bit has no effect on this register.
This register must not be written. Writing this register may produce unexpected results.
Register 1Dh, 1Eh, 1Fh: Offset Registers
results.
Offset Register Ambient
The PWMx Current Duty Cycle Registers are only writable when the associated fan is in
manual mode. In this case, the register is writable when the start bit is set, but not when
the lock bit is set.
The Lock bit in the Ready/Lock/Start register is locked by the Lock Bit. The START and
OVRID bits are always writable, both when the start bit is set and when the lock bit is set.
The Interrupt status registers are cleared on a read if no events are active
The INTEN bit in register 7Ch is always writable, both when the start bit is set and when
the lock bit is set.
In Shutdown Mode (LPMD=1 & START=0) all the H/W Monitoring registers/bits are not
accessible except for the following: Bits[2:0] in the Special Function Register (SFTR) at
offset 7Ch and Bits[7:0] in the Configuration register at offset 7Fh.
These Reserved bits are read/write bits. Writing these bits to a ‘1’ has no effect on the
hardware.
SMSC bits may be read/write bits. Writing these bits to a value other than the default value
may cause unwanted results
10h: SMSC Test Register
Register Name
Offset Register 2
Offset Register 1
SMSC TEST
Register Name
Table 8.3 Register 1Dh, 1Eh, 1Fh: Offset Registers
Table 8.2
Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Register
(MSb)
TST7
Bit 7
DATASHEET
(MSb)
Bit 7
7
7
7
10h: SMSC Test Register
TST6
Bit 6
54
Bit 6
6
6
6
TST5
Bit 5
Bit 5
5
5
5
TST4
Bit 4
Bit 4
4
4
4
TST3
Bit 3
Bit 3
3
3
3
TST2
Bit 2
Bit 2
2
2
2
TST1
Bit 1
Bit 1
1
1
1
SMSC EMC6D103
(LSb)
(LSb)
TST0
Bit 0
Bit 0
0
0
0
Datasheet
Default
Default
Value
Value
00h
00h
00h
00h

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