AD1981AJSTZ Analog Devices Inc, AD1981AJSTZ Datasheet - Page 11

IC CODEC STEREO MICPREAMP 48LQFP

AD1981AJSTZ

Manufacturer Part Number
AD1981AJSTZ
Description
IC CODEC STEREO MICPREAMP 48LQFP
Manufacturer
Analog Devices Inc
Series
SoundMAX®r
Type
Audio Codec '97r
Datasheet

Specifications of AD1981AJSTZ

Data Interface
Serial
Resolution (bits)
16, 20 b
Number Of Adcs / Dacs
4 / 2
Sigma Delta
No
Dynamic Range, Adcs / Dacs (db) Typ
85 / 90
Voltage - Supply, Analog
4.65 V ~ 5.25 V
Voltage - Supply, Digital
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD1981AJSTZ
Manufacturer:
ADI
Quantity:
634
PHV[4:0]
PHM
MCV[4:0]
M20
MCM
RLV[4:0]
RM
LLV[4:0]
LM
RCV[4:0]
RM
LCV[4:0]
CM
Reg Num Name
Reg Num Name
For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
Reg Num Name
For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
0Eh
10h
12h
Line In Volume LM
CD Volume CM
Mic Volume MCM
Phone Volume: Allows setting the phone volume attenuator in 32 volume levels. The LSB represents 1.5 dB, and
MIC Volume Gain: Allows setting the mic volume attenuator in 32 volume levels. The LSB represents 1.5 dB, and
Line In Volume Right: Allows setting the line in right channel attenuator in 32 volume levels. The LSB represents
Line In Volume Left: Allows setting the line in left channel attenuator in 32 volume levels. The LSB represents
Right CD Volume: Allows setting the CD right channel attenuator in 32 volume levels. The LSB represents 1.5 dB,
Left CD Volume: Allows setting the CD left channel attenuator in 32 volume levels. The LSB represents 1.5 dB,
the range is +12 dB to –34.5 dB. The default value is 0 dB with mute bit enabled.
Phone Mute: When this bit is set to “1,” the phone channel is muted.
the range is +12 dB to –34.5 dB. The default value is 0 dB with mute enabled.
MIC Gain Boost: This bit allows setting additional MIC gain to increase the microphone sensitivity.
The nominal gain boost by default is 20 dB; however, bits D0 and D1 (MBG[1:0]) on the miscellaneous control
bits register (76h) allow changing the gain boost to 10 dB or 30 dB if necessary.
0 = Disabled; Gain = 0 dB
1 = Enabled; Default Gain = 20 dB (see Register 76h, bits D0, D1)
MIC Mute: When this bit is set to “1,” the MIC channel is muted.
1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
Right Channel Mute: Once enabled by the MSPLT Bit in Register 76h, this bit mutes the right channel separately
from the LM bit. Otherwise, this bit will always read “0” and will have no effect when set to “1.”
1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
Line In Mute: When this bit is set to “1,” both L/R channels are muted unless the MSPLT Bit in Register 76h is
set to “1,” in which case this mute bit will only affect the left channel.
and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
Right Channel Mute: Once enabled by the MSPLT Bit in Register 76h, this bit mutes the right channel separately
from the CM bit. Otherwise, this bit will always read “0” and will have no effect when set to “1.”
and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled.
CD Volume Mute: When this bit is set to “1,” both L/R channels are muted, unless the MSPLT Bit in Register 76h
is set to “1,” in which case, this mute bit will only affect the left channel.
D15 D14 D13 D12
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5
D15 D14 D13 D12
X
X
X
X LCV4 LCV3 LCV2 LCV1 LCV0 RM
X LLV4 LLV3 LLV2 LLV1 LLV0 RM
X
X
D11
D11
X
Line In Volume (Index 10h)
Mic Volume (Index 0Eh)
CD Volume (Index 12h)
D10
X
D10
X
D9
D9
X
D8
X M20 X MCV4 MCV3 MCV2 MCV1 MCV0 8008h
D8
D7 D6 D5
D7 D6 D5
X
X
X RCV4 RCV3 RCV2 RCV1 RCV0 8808h
D4
X RLV4 RLV3 RLV2 RLV1 RLV0 8808h
D4
D4
D3
D3
D3
D2
D2
D2
D1
D1
D1
AD1981A
D0
D0
D0 Default
Default
Default

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