AD1981AJST Analog Devices Inc, AD1981AJST Datasheet - Page 4

• Manufacturer Part Number: AD1981AJST
• Description: IC CODEC STEREO MICPREAMP 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1981AJST

• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 4 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 90
• Voltage - Supply, Analog: 4.65 V ~ 5.25 V
• Voltage - Supply, Digital: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1981A–SPECIFICATIONS
Parameter
POWER-DOWN STATES
Parameter
TIMING PARAMETERS
(Guaranteed over Operating Temperature Range)
NOTES
1
2
3
Specifications subject to change without notice.
Guaranteed but not tested.
Measurement reflects main ADC.
Values presented with V
(Fully Active)
ADC
DAC
ADC + DAC
Mixer
ADC + Mixer
DAC + Mixer
ADC + DAC + Mixer
Standby
Headphone Standby
RESET Active Low Pulsewidth
RESET Inactive to BIT_CLK Start-Up Delay
SYNC Active High Pulsewidth
SYNC Low Pulsewidth
SYNC Inactive to BIT_CLK Start-Up Delay
BIT_CLK Frequency
BIT_CLK Period
BIT_CLK Output Jitter
BIT_CLK High Pulsewidth
BIT_CLK Low Pulsewidth
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to Trailing Edge of RESET
Rising Edge of RESET to HI-Z Delay
Propagation Delay
RESET Rise Time
Output Valid Delay from Rising Edge of BIT_CLK to SDI Valid
(Applies to SYNC, SDATA_OUT)
REFOUT
not loaded.
1
3
Set Bits
(No Bits Value)
PR0
PR1
PR1, PR0
PR2
PR2, PR0
PR2, PR1
PR2, PR1, PR0
PR5, PR4, PR3, PR2, PR1, PR0
PR6
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RST_LOW
RST2CLK
SYNC_HIGH
SYNC_LOW
SYNC2CLK
CLK_PERIOD
CLK_HIGH
CLK_LOW
SYNC_PERIOD
SETUP
HOLD
RISECLK
FALLCLK
RISESYNC
FALLSYNC
RISEDIN
FALLDIN
RISEDOUT
FALLDOUT
S2_PDOWN
SETUP2RST
OFF
DV
47
39
32
13
47
39
32
13
0
47
DD
Typ
Min
162.8
162.8
32.56
32.56
5
5
2
2
2
2
2
2
2
2
0
15
AV
53
47
40
34
21
16
8
1
0
40
Typ
1.0
1.3
19.5
12.288
81.4
750
42
38
48.0
20.8
2.5
4
4
4
4
4
4
4
4
DD
Typ
Max
48.84
48.84
6
6
6
6
6
6
6
6
1.0
25
15
50
15
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Unit
ms
ns
ms
ns
MHz
ns
ps
ns
ns
kHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns