ENC28J60-I/SP Microchip Technology, ENC28J60-I/SP Datasheet - Page 23
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ENC28J60-I/SP
Manufacturer Part Number
ENC28J60-I/SP
Description
IC ETHERNET CTRLR W/SPI 28DIP
Manufacturer
Microchip Technology
Specifications of ENC28J60-I/SP
Package / Case
28-DIP (0.300", 7.62mm)
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
SPI
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Operating Supply Voltage
3.1 V to 3.6 V
Supply Current (max)
180 mA
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps
Ethernet Connection Type
10Base-T
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ENC28J60-I/SP
Manufacturer:
MICROCHIP
Quantity:
6 500
REGISTER 3-3:
REGISTER 3-4:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3
bit 2
bit 1
bit 0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
MIISCAN: MII Scan Enable bit
1 = PHY register at MIREGADR is continuously read and the data is placed in MIRD
0 = No MII Management scan operation is in progress
MIIRD: MII Read Enable bit
1 = PHY register at MIREGADR is read once and the data is placed in MIRD
0 = No MII Management read operation is in progress
Unimplemented: Read as ‘0’
Reserved: Maintain as ‘0’
NVALID: MII Management Read Data Not Valid bit
1 = The contents of MIRD are not valid yet
0 = The MII Management read cycle has completed and MIRD has been updated
SCAN: MII Management Scan Operation bit
1 = MII Management scan operation is in progress
0 = No MII Management scan operation is in progress
BUSY: MII Management Busy bit
1 = A PHY register is currently being read or written to
0 = The MII Management interface is Idle
U-0
U-0
—
—
MICMD: MII COMMAND REGISTER
MISTAT: MII STATUS REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
—
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
R-0
—
r
NVALID
U-0
R-0
—
x = Bit is unknown
x = Bit is unknown
ENC28J60
MIISCAN
R/W-0
SCAN
R-0
DS39662C-page 21
R/W-0
MIIRD
BUSY
R-0
bit 0
bit 0