ENC28J60-I/SO Microchip Technology, ENC28J60-I/SO Datasheet

IC ETHERNET CTRLR W/SPI 28SOIC

ENC28J60-I/SO

Manufacturer Part Number
ENC28J60-I/SO
Description
IC ETHERNET CTRLR W/SPI 28SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of ENC28J60-I/SO

Package / Case
28-SOIC (7.5mm Width)
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
SPI
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Range (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.1 V to 3.6 V
Supply Current (max)
180 mA
Data Rate
10Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3
Interface Type
SPI
Supply Current
180mA
Supply Voltage Range
3.1V To 3.6V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Ethernet Connection Type
10Base-T
Digital Ic Case Style
SOIC
No. Of Pins
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163024 - BOARD DEMO PICDEM.NET 2AC164123 - BOARD DAUGHTER ETH PICTAIL PLUSAC164121 - BOARD DAUGHTER PICTAIL ETHERNET
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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The ENC28J60 devices that you have received conform
functionally to the current Device Data Sheet
(DS39662C), except for the anomalies described in this
document.
The silicon issues discussed in the following pages are
for silicon listed in Table 1. The silicon issues are
summarized in Table 2. Issues specific to technical
conformance with IEEE Std. 802.3 are listed in Table 3.
Data Sheet clarifications and corrections start on page 9,
following the discussion of silicon issues.
TABLE 1:
 2010 Microchip Technology Inc.
ENC28J60 Silicon Errata and Data Sheet Clarification
Part Number
ENC28J60
SILICON EREVID VALUES
0000 0010
B1
The silicon revision level can be retrieved by querying
the read-only EREVID register, located at address 12h
in Bank 3 of the device’s Control register space. Please
refer to the Device Data Sheet for detailed information
on accessing this register. The values for the various
ENC28J60 silicon revisions are shown in Table 1.
0000 0100
Note:
B4
ENC28J60
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 and Table 3 apply to the current
silicon revision (B7).
0000 0101
B5
DS80349C-page 1
0000 0110
B7

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ENC28J60-I/SO Summary of contents

Page 1

... EREVID register, located at address 12h in Bank 3 of the device’s Control register space. Please refer to the Device Data Sheet for detailed information on accessing this register. The values for the various ENC28J60 silicon revisions are shown in Table 0000 0010 0000 0100 ...

Page 2

... ENC28J60 TABLE 2: SILICON ISSUE SUMMARY Module Feature Issue MAC — 1. Interface Reset — 2. Core Operating 3. Specifications Oscillator CLKOUT pin 4. Memory Ethernet 5. Buffer Interrupts — 6. PHY — 7. PHY — 8. PHY — 9. PHY — 10. PHY LEDs — 11. Transmit — 12. Logic PHY — 13. ...

Page 3

... MHz), 25/4 25/5 (5 MHz), etc., and synchronize with the 25 MHz clock entering OSC1 on the ENC28J60. This could potentially be accom- plished by feeding the same 25 MHz clock into the ENC28J60 and host controller. Alterna- tively, the host controller could potentially be clocked off of the CLKOUT output of the ENC28J60 ...

Page 4

... ENC28J60 6. Module: Interrupts The Receive Packet Pending Interrupt Flag (EIR.PKTIF) does not reliably/accurately report the status of pending packets. Work around In the Interrupt Service Routine (ISR unknown if a packet is pending and the source of the interrupt, switch to Bank 1 and check the value in EPKTCNT. ...

Page 5

... TXERIF. If the Transmit Interrupt (TXIF) did not occur, software must clear the ECON1.TXRTS bit to force the transmit state machine into the correct state. The logic in Example 1 (following page) will accomplish a transmission and any necessary retransmissions with a maximum retry abort. Affected Silicon Revisions ENC28J60 B7 X DS80349C-page 5 ...

Page 6

... ENC28J60 EXAMPLE 1: ECON1.TXRST = 1 ECON1.TXRST = 0 EIR.TXERIF = 0 EIR.TXIF = 0 ECON1.TXRTS = 1 while(EIR.TXIF = 0 and EIR.TXERIF = 0) NOP ECON1.TXRTS = 0 read tsv for retrycount = (EIR.TXERIF and tsv<Transmit Late Collision>) then ECON1.TXRST = 1 ECON1.TXRST = 0 EIR.TXERIF = 0 EIR.TXIF = 0 ECON1.TXRTS = 1 while(EIR.TXIF = 0 and EIR.TXERIF = 0) NOP ECON1.TXRTS = 0 read tsv else exit for end if next retrycount 14. Module: Memory (Ethernet Buffer) ...

Page 7

... CLKRDY bit (bit 0) is set and the unimplemented bit (bit 3) is clear. If one or both of these conditions are not met, this may indicate that the ENC28J60 is not ready yet (e.g., the microcontroller has exited POR while ENC28J60 is still powering up). In this case, repeat the procedure from Step 1. ...

Page 8

... Standard 802.3. These issues are not present after Revision B4 and are included for informational purposes. 1. Issue: TP_IDL Pattern The observed TP_IDL pattern transmitted by ENC28J60 was observed to not stay within the standard defined template when using the TPM (Twisted Pair Model) and TP Test Load 2. Reference: IEEE Std 802 ...

Page 9

... This implies that any value can be used. In fact, for correct operation required that the EPMOH:EPMOL programmed with an even value only (i.e., EPMOL<0> must always be ‘0’).  2010 Microchip Technology Inc. registers be ENC28J60 DS80349C-page 9 ...

Page 10

... Adds Data Sheet Clarification 1 (Receive Filters). This document replaces these errata documents: • DS80254, “ENC28J60 Revision B1 Silicon Errata” • DS80257, “ENC28J60 Revision B4 Silicon Errata” • DS80264, “ENC28J60 Revision B5 Silicon Errata” DS80349C-page 10 1 (TP_IDL  2010 Microchip Technology Inc. ...

Page 11

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 12

... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350  2010 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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