CY7C68300C-56PVXC Cypress Semiconductor Corp, CY7C68300C-56PVXC Datasheet - Page 10
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CY7C68300C-56PVXC
Manufacturer Part Number
CY7C68300C-56PVXC
Description
IC USB 2.0 BRIDGE AT2LP 56-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Type
USB to ATA/ATAPI Bridger
Datasheets
1.CY7C68300C-56PVXC.pdf
(42 pages)
2.CY7C68320C-100AXA.pdf
(44 pages)
3.CY7C68300C-56PVXC.pdf
(42 pages)
Specifications of CY7C68300C-56PVXC
Package / Case
56-SSOP
Controller Type
USB 2.0 Controller
Interface
I²C
Voltage - Supply
3.15 V ~ 3.45 V
Current - Supply
50mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Bits
48
Operating Temperature Range
0 C to + 70 C
Supply Current
10 mA
Operating Supply Voltage
3.3 V
Controller Family/series
(8051) USB
Core Size
8 Bit
No. Of I/o's
6
Embedded Interface Type
I2C, USB
Digital Ic Case Style
SSOP
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Package Type
SSOP
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4615B - KIT USB TO ATA REFERENCE DESIGN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2266-5
CY7C68300C-56PVXC
CY7C68300C-56PVXC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C68300C-56PVXC
Manufacturer:
HITACHI
Quantity:
2 000
Company:
Part Number:
CY7C68300C-56PVXC
Manufacturer:
CY
Quantity:
8
Part Number:
CY7C68300C-56PVXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Table 1. AT2LP Pin Descriptions (continued)
Note Italic pin names denote pin functionality during CY7C68300A compatibility mode
Document Number: 001-05809 Rev. *H
Notes
TQFP
4. If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See
5. A ‘#’ sign after the pin name indicates that it is active LOW.
100
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
QFN
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
56
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SSOP
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
56
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
VBUSPWRD
LOWPWR#
Pin Name
DIOW#
DMACK#
DIOR#
GND
GND
GND
GND
GND
GND
SDA
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
V
V
V
V
V
NC
NC
NC
NC
NC
NC
NC
CC
CC
CC
CC
CC
[5]
O/Z
O/Z
O/Z
Type
PWR
I/O
I/O
I/O
I/O
PWR
GND
I/O
I/O
I/O
I/O
GND
PWR
GND
PWR
GND
PWR
Pin
NC
NC
NC
NC
NC
NC
I/O
O
I
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
Default State
Driven HIGH
Driven HIGH
Driven HIGH
at Startup
(CMOS)
(CMOS)
(CMOS)
High Z
High Z
High Z
High Z
High Z
High Z
High Z
High Z
Input
Data signal for I
Apply a 2.2k pull up resistor.
No connect.
V
ATA data bit 0.
ATA data bit 1.
ATA data bit 2.
ATA data bit 3.
V
Ground.
No connect.
Ground.
No connect.
Ground.
ATA data bit 4.
ATA data bit 5.
ATA data bit 6.
ATA data bit 7. Apply a 1k pull down to GND.
Ground.
V
Ground.
No connect.
V
ATA control.
ATA control.
ATA control.
No connect.
USB suspend indicator. (See
No connect.
Bus powered mode selector. (See
No connect.
Ground.
V
CC
CC
CC
CC
CC
. Connect to 3.3 V power source.
. Connect to 3.3 V power source.
. Connect to 3.3 V power source.
. Connect to 3.3 V power source.
. Connect to 3.3 V power source.
CY7C68300C, CY7C68301C
CY7C68320C, CY7C68321C
2
C interface. (See
Pin Description
VBUS_ATA_ENABLE on page
LOWPWR# on page
VBUSPWRD on page
SCL, SDA on page
Page 10 of 44
15.
14).
13).
15).
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