CY7C68300C-56PVXC Cypress Semiconductor Corp, CY7C68300C-56PVXC Datasheet
CY7C68300C-56PVXC
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CY7C68300C-56PVXC
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CY7C68300C-56PVXC Summary of contents
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... Pin Compatible with CY7C68300A (using Backward Compati- bility Mode) ■ 56-Pin SSOP and 56-Pin QFN Pb-free Packages ■ CY7C68301C is Ideal for Battery Powered Designs ■ CY7C68300C is Ideal for Self and Bus Powered Designs • 198 Champion Court • San Jose CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C ...
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... Logic Block Diagram 24 MHz XTAL VBUS USB D+ D- Applications The CY7C68300C/301C and CY7C68320C/321A implement a USB 2.0 bridge for all ATA/ATAPI-6 compliant mass storage devices, such as the following: ■ Hard Drives ■ CD-ROM, CD-R/W ■ DVD-ROM, DVD-RAM, DVD±R/W ■ MP3 Players ■ ...
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... Operational Mode Selection Flow .................................. 19 Fused Memory Data ....................................................... 20 Normal Mass Storage Mode ........................................... 20 Board Manufacturing Test Mode .................................... 20 EEPROM Organization .................................................. 22 Programming the EEPROM ........................................... 35 Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C ABSOLUTE MAXIMUM RATINGS ....................................... 36 OPERATING CONDITIONS .................................................. 36 DC CHARACTERISTICS ...................................................... 36 AC ELECTRICAL CHARACTERISTICS .............................. 37 ATA Timing Characteristics ............................................ 37 USB Transceiver Characteristics ................................... 37 ORDERING INFORMATION ...
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... The device initialization process is configurable, enabling the AT2LP to initialize ATA/ATAPI devices without software inter- vention. CY7C68300A Compatibility As mentioned in the previous section, the CY7C68300C/301C contains a backward compatibility mode that enables used in existing EZ-USB AT2 (CY7C68300A) designs. The backward compatibility mode is enabled by programming the EEPROM with the CY7C68300A signature ...
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... The AT2LP is available in different package types to meet a variety of design needs. The CY7C68320C/321C is available in 56-pin QFN and 100-pin TQFP packages to provide the greatest flexibility for new designs. The CY7C68300C/301C is available in 56-pin SSOP and QFN package types to ensure backward compatibility with CY7C68300A designs. ...
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... Figure 3. 56-Pin QFN Pinout (CY7C68300C/CY7C68301C) IORDY 1 DMARQ 2 AVCC 3 XTALOUT 4 XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 (PU10K) PWR500# 13 GND 14 Note Italic labels denote pin functionality during CY7C68300A compatibility mode. Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 42 RESET# 41 GND 40 ARESET# 39 DA2 (VBUS_PWR_VALID) ...
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... AGND 13 VCC 14 DPLUS 15 DMINUS 16 GND 17 VCC 18 GND 19 GPIO1 20 GND 21 22 SCL SDA 23 VCC 24 DD0 25 DD1 26 DD2 27 DD3 28 Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C DD12 56 DD11 55 DD10 54 DD9 53 DD8 52 VBUS_ATA_ENABLE 51 VCC 50 RESET# 49 GND 48 ARESET# 47 DA2 46 CS1# 45 CS0# 44 GPIO0 43 DA1 42 DA0 41 INTRQ ...
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... Figure 5. 56-Pin QFN Pinout (CY7C68320C/CY7C68321C) IORDY 1 DMARQ 2 AVCC 3 XTALOUT 4 XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 GPIO1 13 GND 14 Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 42 RESET# 41 GND 40 ARESET# 39 DA2 38 CS1# 37 CS0# 36 GPIO0 35 DA1 34 DA0 33 INTRQ 32 VCC 31 DMACK# 30 DIOR# 29 DIOW# Page ...
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... XTALIN AGND VCC 16 DPLUS 17 DMINUS 18 GND 19 VCC 20 GND 21 SYSIRQ 22 GND 23 24 GND GND 25 PWR500 GND NC 28 SCL 29 SDA 30 Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C DD8 80 VBUS_ATA_ENABLE 79 VCC 78 RESET GND 75 ARESET# 74 DA2 73 CS1# 72 CS0# 71 DRVPWRVLD 70 DA1 69 DA0 68 INTRQ 67 VCC 66 GND VBUSPWRD 62 ...
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... HIGH. Connect to GND if functionality is not used. GND Ground. [2] O bMaxPower request granted indicator. (See on page 15). Active LOW. N/A for CY7C68320C/CY7C68321C 56-pin packages. Reserved. Tie to GND. No connect. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Pin Description . Connect to V through the shortest path CC CC XTALIN, XTALOUT on page XTALIN, XTALOUT ...
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... N/A VBUSPWRD 63 N/A N N/A N/A GND Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Pin Default State Type at Startup 2 O Active for Clock signal for I several ms at 13). Apply a 2.2k pull up resistor. startup. 2 I/O Data signal for I C interface. (See Apply a 2.2k pull up resistor. ...
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... GPIO5 94 N/A N/A GND DD12 DD13 DD14 DD15 Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Pin Default State Type at Startup [1] I Input ATA interrupt request. [1] O/Z Driven HIGH ATA address. after 2 ms delay [1] O/Z Driven HIGH ATA address. after 2 ms delay ...
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... GND as shown in apply it to XTALIN and leave XTALOUT unconnected. Figure 7. XTALIN/XTALOUT Diagram Table 2 for 12pF Yes No Yes XTALIN CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Pin Description ATAPUEN ± 100 ppm) signal to derive Figure alternate clock source is used, 24MHz Xtal 12pF XTALOUT Page [+] Feedback ...
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... The SYSIRQ pin must be pulled LOW if HID functionality is used. Refer to HID Functions for Button Controls details on HID functionality Figure 8. SYSIRQ Latching Algorithm No Yes Yes Yes CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C depicts the latching algorithm incorporated by on page 16 for more EP1 Data Byte SYSIRQ=1? Yes Latch State of IO Pins Set Int_Data = 1 ...
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... Table 4. Behavior of Descriptor Data that is Dependent Upon VBUSPWRD State Pin VBUSPWRD = ‘1’ bMaxPower Reported Value bmAttributes Bit 6 Reported Value CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C on page 16 for more information on page 16 for more information VBUSPWRD = ‘0’ VBUSPWRD N/A (56-pin) 0xFA 0x01 The value (500 mA) (2 mA) ...
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... Command Blocks. All other fields of the CBW and restrictions on the CBWCB remain as defined in the USB Mass Storage Class ATA Bulk-Only Transport Specification. The ATACB must be 16 bytes in length. The following table and text defines the fields of the ATACB. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Table ...
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... Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Field Description This field indicates to the CY7C68300C/CY7C68301C that the ATACB contains a vendor-specific command block. The value of this field must match the value in EEPROM address 0x04 for the command to be recognized as a vendor-specific ATACB command. ...
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... Reserved Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Field Description This field controls which of the TaskFile register read or write accesses occur. TaskFile read data is always 8 bytes in length, and unselected register data are returned as 0x00. Register accesses occur in sequential order as outlined ...
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... Data on page 20 for more information. This is not a valid mode of operation if no factory programming has been done. ■ EEPROM signature of 0x4D4D is found, the CY7C68300C/CY7C68301C uses the same pinout and EEPROM format as the CY7C68300A (EZ-USB AT2+). ■ EEPROM signature of 0x534B is found, the AT2LP uses the values stored in the EEPROM to configure the USB descriptors for normal operation. ■ ...
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... Reserved (0) 14 (0Eh) Reserved (0) 15–30 (0Fh1Eh) Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Specification. There is a vendor-specific ATAPI command for EEPROM accesses (CfgCB) and one for board level testing (MfgCB), as described in the following sections. There is a convenient method available for starting the AT2LP in Board Manufacturing Test Mode to enable reprogramming of EEPROMs without a mass storage device attached ...
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... Mode operation. See Mfg_read data format. Any data length can be specified, but only bytes 0 through 3 contain usable information length of 4 bytes is recommended. Table 10. Mfg_read and Mfg_load Data Format Byte Bits 5:4 Bits 3 2 Table 10 for an expla 7:0 3 7:0 CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Bits ...
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... for EEPROM devices that are internally byte-addressed memories recommended that the address pins be set this way even on EEPROMs that may indicate that the address pins are internal no-connects. Figure 11. Snapshot of ‘AT2LP Blaster’ Utility CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C on page 20 for details on how Page [+] Feedback ...
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... Bit 3 Enable a delay 120 ms at each read of the DRQ bit where the device data length does not match the host data length. This enables the CY7C68300C/CY7C68301C to work with most devices that incorrectly clear the BUSY bit before a valid status is present BUSY bit delay. ...
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... PIO mode supported by the device. The AT2LP supports PIO modes 0, 3, and 4 only. PIO mode 0 is always enabled and has no corresponding configuration bit. Bit 1 = Enable PIO mode 4. Bit 0 = Enable PIO mode 3. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents ...
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... AT2LP enumerates a removable ATA device, such as CompactFlash or MicroDrive, as the IDE master device. Enabling this pin also affects other pins related to removable device operation Disable removable ATA device support Enable removable ATA device support. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents ...
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... ATA bus to discover the number of LUNs Search ATA bus and determine number of LUNs 01 = Assume only LUN0 present; no ATA bus search 10 = Assume LUN0 and LUN1 present; no ATA bus search 11 = Assume LUN0 and LUN1 present; no ATA bus search CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents ...
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... HID: 3 for CSM Length of device descriptor in bytes Type Descriptor type USB Specification release number in BCD USB Specification release number in BCD Device class Device subclass Device protocol CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 0x12 0x01 ...
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... Length of this descriptor in bytes Endpoint descriptor type This is an out endpoint, endpoint number 2. This is a bulk endpoint. Maximum data transfer size set by speed (Full speed 0x0040; high-speed 0x0200) CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x40 0x01 ...
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... Interval for polling (max. NAK rate) Length of HID descriptor Descriptor Type HID HID Class Specification release number (1.10) Country Code Number of class descriptors (1 report descriptor) Descriptor Type Length of HID report descriptor CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 0x07 ...
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... Report Size 8 bits Report Count 2 fields Output (Data, Variable, Absolute) End Collection Byte length of this descriptor Interface Descriptor type Number of interface Value used to select an alternate setting for the interface identified in prior field CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x06 0xA0 0xFF ...
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... Index of string descriptor that describes the Content Security Method CSM descriptor version number LANGID string descriptor length in bytes Descriptor type Language supported. The CY7C68300B supports one LANGID value. String descriptor length in bytes (including bLength) Descriptor type CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x02 0x0D 0x00 ...
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... Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents ’C’ 0x43 0x00 ’y’ 0x79 0x00 ’ ...
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... Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x2C 0x03 ’U’ 0x55 0x00 ’ ...
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... ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character Amount of unused ROM space varies depending on strings. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 ’8’ 0x38 0x00 ’9’ 0x39 0x00 ’ ...
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... Data Source Starting Address Data Length 2 C memory device when none is connected result CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 2 C memory device Table 12. Attempts to write outside this 2 C memory device) remains unchanged. wLength Data Data Length ...
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... CC I Unconfigured Current UNCONFIG T Reset Time After Valid Power RESET Pin Reset After Power Up Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Operating Conditions T (Ambient Temperature Under Bias) A Commercial ...................................................... 0°C to +70°C Automotive..................................................... -40°C to +85°C Supply Voltage............................................+3.00V to +3.60V Ground Voltage.................................................................. 0V F (Oscillator or Crystal Frequency) .... 24 MHz ± ...
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... AT2LP configuration space and the data reported by the drives in response to an IDENTIFY DEVICE command. Ordering Information Part Number CY7C68300C-56PVXC 56 SSOP Pb-free for self and bus powered designs CY7C68301C-56PVXC 56 SSOP Pb-free for battery powered designs CY7C68300C-56LFXC ...
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... BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH 0.20 MAX. 3. DIMENSIONS IN MILLIMETERS A CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 1.40±0.05 12°±1° SEE DETAIL (8X) ...
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... Document 001-05809 Rev. *E Figure 14. 56-Pin QFN LF56A SIDE VIEW 0.08[0.003] C 1.00[0.039] MAX. 0.05[0.002] MAX. 0.80[0.031] MAX. 0.20[0.008] REF. 6.1 0°-12° 0.30[0.012] C SEATING PLANE 0.50[0.020] CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 51-85062 *C BOTTOM VIEW 6.1 0.18[0.007] 0.28[0.011] PIN1 ID N 0.20[0.008 0.45[0.018] SOLDERABLE EXPOSED PAD 0 ...
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... The thickness of the solder paste template must be 5 mil recommended that ’No Clean,’ type 3 solder paste is used to mount the part. Nitrogen purge is recommended during reflow. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 001-53450 ** Page [+] Feedback ...
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... Power must be applied to the CY7C68300C/CY7C68301C before the same time as the ATA/ATAPI device. If power is supplied to the drive first, the CY7C68300C/CY7C68301C startup in an undefined state. Designs that use separate power supplies for the CY7C68300C/CY7C68301C and the ATA/ATAPI device are not recommended. Document 001-05809 Rev. *E CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 0.017” ...
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... Document History Page Description Title: CY7C68300C/CY7C68301C/CY7C68320C/CY7C68321C EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI Bridge Document Number: 001-05809 Submission Rev. ECN No. Date ** 409321 See ECN *A 611658 See ECN *B 2717536 06/11/2009 *C 2733311 07/08/09 *D 2755364 08/28/09 *E 2813871 11/25/09 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturers representatives, and distributors ...