DP83815DUJB/NOPB National Semiconductor, DP83815DUJB/NOPB Datasheet - Page 52

• Manufacturer Part Number: DP83815DUJB/NOPB
• Description: IC MEDIA ACCESS CONTROL 160-LBGA
• Manufacturer: National Semiconductor

Specifications of DP83815DUJB/NOPB

• Controller Type: Ethernet Controller, MAC/BIU
• Interface: PCI
• Voltage - Supply: 3.3V
• Current - Supply: 170mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83815DUJB; *DP83815DUJB/NOPB; DP83815DUJB

4.0 Register Set
4.2.12 Receive Configuration Register
This register is used to set the receive configuration for DP83815. Receive properties such as accepting error packets,
runt packets, setting the receive drain threshold etc. are controlled here.
25-23
22-20
19-6
Bit
31
30
29
28
27
26
Bit Name
MXDMA
ARP
AEP
ALP
ATX
Offset: 0034h
(Continued)
Tag: RXCFG
Accept Errored Packets
When set to 1, all packets with CRC, alignment, and/or collision errors will be accepted. When set to 0,
all packets with CRC, alignment, and/or collision errors will be rejected if possible. Note that depending
on the type of error, some packets may be received with errors, regardless of the setting of AEP. These
errors will be indicated in the CMDSTS field of the last descriptor in the packet.
Accept Runt Packets
When set to 1, all packets under 64 bytes in length without errors are accepted. When this bit is 0, all
packets less than 64 bytes in length will be rejected if possible.
unused
Accept Transmit Packets
When set to 1, data received simultaneously to a local transmission (such as during a PMD loopback or
full duplex operation) will be accepted as valid received data. Additionally, when set to 1, the receiver will
ignore collision activity. When set to 0 (default), all data receive simultaneous to a local transmit will be
rejected. This bit must be set to 1 for PMD loopback and full duplex operation.
Accept Long Packets
When set to 1, all packets > 1518 bytes in length and <= 2046 bytes will be treated as normal receive
packets, and will not be tagged as long or error packets. All packets > 2046 bytes in length will be
truncated at 2046 bytes and either rejected from the FIFO, or tagged as long packets. Care must be
taken when accepting long packets to ensure that buffers provided are of adequate length. When ALP is
set to 0, packets larger than 1518 bytes (CRC inclusive) will be truncated at 1514 bytes, and rejected if
possible.
unused
unused
Writes are ignored, reads return 000b.
Max DMA Burst Size per Rx DMA Burst
This field sets the maximum size of receive DMA data bursts according to the following table:
unused
000 = 128 32-bit words (512 bytes)
001 = 1 32-bit word (4 bytes)
010 = 2 32-bit words (8 bytes)
011 = 4 32-bit words (16 bytes)
100 = 8 32-bit words (32 bytes)
101 = 16 32-bit words (64 bytes)
110 = 32 32-bit words (128 bytes)
111 = 64 32-bit words (256 bytes)
Access: Read Write
Size: 32 bits
52
Description
Hard Reset: 00000002h
Soft Reset: 00000002h
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