PCX107AVZFU100LC E2V, PCX107AVZFU100LC Datasheet - Page 37

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PCX107AVZFU100LC

Manufacturer Part Number
PCX107AVZFU100LC
Description
IC PCI BRIDGE MEM CTRLR 503PBGA
Manufacturer
E2V
Datasheet

Specifications of PCX107AVZFU100LC

Controller Type
PCI Controller
Interface
PCI
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
-40°C ~ 110°C
Mounting Type
Surface Mount
Package / Case
503-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCX107AVZFU100LC
Manufacturer:
E2V
Quantity:
10 000
7.2.8
2137D–HIREL–08/05
IEEE 1149.1 (JTAG) AC Timing Specifications
Table 7-12
ating mode.
At recommended operating conditions (see
Table 7-12.
Notes:
Figure 7-16. JTAG Clock Input Timing Diagram
Figure 7-17. JTAG TRST Timing Diagram
Num
10
11
12
13
1
2
3
4
5
6
7
8
9
1. TRST is an asynchronous signal. The setup time is for test purposes only.
2. Non-test (other than TDI and TMS) signal input timing with respect to TCK.
3. Non-test (other than TDO) signal output timing with respect to TCK.
4. Timings are independent of the system clock (PCI_SYNC_IN).
TRST
TCK
TCK
Characteristics
TCK Frequency of Operation
TCK Cycle Time
TCK Clock Pulse Width Measured at 1.5V
TCK Rise and Fall Times
TRST_ Setup Time to TCK Falling Edge
TRST_ Assert Time
Boundary Scan Input Data Setup Time
Boundary Scan Input Data Hold Time
TCK to Output Data Valid
TCK to Output High Impedance
TMS, TDI Data Setup Time
TMS, TDI Data Hold Time
TCK to TDO Data Valid
TCK to TDO High Impedance
provides the JTAG AC timing specifications for the PC107A while in the JTAG oper-
JTAG AC Timing Specifications (Independent of PCI_SYNC_IN)
3
(4)
3
5
Table 5-2 on page
VM
VM = Midpoint Voltage
2
4
Min
40
20
10
10
15
15
0
0
5
0
0
5
0
0
1
VM
12) with
Max
2
25
30
30
15
15
3
LV
DD
= 3.3
MHz
Unit
VM
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PC107A
±
0.3V
Notes
(1)
(2)
(2)
(3)
(3)
37

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