MAX1761EEE Maxim Integrated Products, MAX1761EEE Datasheet - Page 13

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MAX1761EEE

Manufacturer Part Number
MAX1761EEE
Description
DC/DC Switching Controllers
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1761EEE

Number Of Outputs
2
Output Voltage
2.5 V, 1 V to 5.5 V, 1.8 V
Input Voltage
4.5 V to 20 V
Mounting Style
SMD/SMT
Package / Case
QSOP-16
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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In normal operation, the MAX1761’s PWM control algo-
rithm automatically skips pulses at light loads.
Comparators at each CS_ input in the MAX1761 trun-
cate the low-side switch’s on-time at the point where
the inductor current drops to zero. This occurs when
the inductor current is operating at the boundary
between continuous and discontinuous conduction
mode (Figure 4). This threshold is equal to 1/2 the
peak-to-peak ripple current, which is inversely propor-
tional to the inductor value:
where K is the on-time scale factor listed in Table 3. For
example, in the typical application circuit (Figure 1),
with V
2.857µs (Table 3), switchover to pulse-skipping opera-
tion occurs at I
crossover point occurs at an even lower value if a
swinging (soft-saturation) inductor is used.
The switching waveforms may appear noisy and asyn-
chronous when light loading causes pulse-skipping
operation; this is a normal operating condition that
improves light-load efficiency. Trade-offs in PFM noise
vs. light-load efficiency are made by varying the induc-
tor value. Generally, lower inductor values produce a
broader efficiency vs. load curve, while higher values
result in higher full-load efficiency (assuming that the
coil resistance remains fixed) and less output voltage
ripple. Penalties for using higher inductor values
include larger physical size and degraded load-tran-
sient response (especially at low input-voltage levels).
Figure 4. Pulse-Skipping/Discontinuous Crossover Point
Automatic Pulse-Skipping Switchover
OUT1
I
LOAD(SKIP)
0
= 2.5V, V+ = 15V, L = 9µH, and K =
∆i
∆t
ON-TIME
LOAD
=
V + -V
______________________________________________________________________________________
L
= 0.33A or about 1/8 full load. The
OUT
K V
×
2L
TIME
OUT
V + - V
-I
V +
PEAK
OUT
I
LOAD
Buck Controller for Notebooks
= I
PEAK
/2
Small, Dual, High-Efficiency
The low-noise, forced-PWM mode (ON2 floating) dis-
ables the zero-crossing current comparator that con-
trols the low-side switch on-time. The resulting low-side
gate-drive waveform is forced to become the comple-
ment of the high-side gate-drive waveform. This, in turn,
causes the inductor current to reverse at light loads as
the PWM loop strives to maintain a constant duty ratio
of V
keeps the switching frequency nearly constant, but it
results in a higher no-load battery current that can be
10mA to 40mA, depending on the gate capacitance of
the external MOSFETs.
Forced-PWM mode is most useful for reducing audio-
frequency noise, improving load-transient response,
and providing sink-current capability for dynamic out-
put voltage adjustment. Multiple-output applications
that use a flyback transformer or coupled inductor also
benefit from forced-PWM operation because the contin-
uous switching action improves cross-regulation.
The current-limit circuit employs a unique “valley” cur-
rent-sensing algorithm that uses the on-state resistance
of the low-side MOSFET as a current-sensing element.
If the current-sense signal is above the current-limit
threshold, the PWM is not allowed to initiate a new
cycle (Figure 5). The actual peak current is greater than
the current-limit threshold by an amount equal to the
inductor ripple current. Therefore, the exact current-
limit characteristic and maximum load capability are a
function of the MOSFET on-resistance, inductor value,
and input voltage. The reward for this uncertainty is
robust, lossless overcurrent sensing. When combined
with the undervoltage protection circuit, this current-
limit method is effective in almost every circumstance.
There is also a negative current limit that prevents
excessive reverse inductor currents when V
ing current (forced PWM mode only). The negative cur-
rent-limit threshold is set to approximately 120% of the
positive current limit.
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the cur-
rent-sense signals seen by CS_. Mount or place the IC
close to the low-side MOSFET with short, direct traces,
making a Kelvin-sense connection to the source and
drain terminals.
If greater current-limit accuracy is desired, CS can be
connected to an external sense resistor inserted
between the source of the low-side switch and ground
(Figure 6). The resulting current limit will be ILIM = 0.1V
/ R
SENSE
OUT
Forced PWM Operation (ON2 floating)
/V+. The benefit of forced-PWM mode is that it
, and it will have ±8% error.
Low-Side Current-Limit Sensing
OUT
is sink-
13

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